Intel C2550 FH8065401488912 Ficha De Dados
Códigos do produto
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
499
Volume 2—Low Pin Count (LPC) Controller—C2000 Product Family
24
Low Pin Count (LPC) Controller
Architecturally, the LPC serves as a PCI-to-ISA bridge to devices connected to the LPC
interface pins. The bridge is discovered by the software at bus 0, device 31 (decimal),
function 0 in the configuration address space. This bridge also accommodates a
number of integrated legacy peripherals, most of which were originally designed for the
Industry Standard Architecture (ISA). These legacy peripherals are integrated in the
SoC:
•
interface with 31 interrupts synchronized
with the LPC clock
•
registers and interface pins
•
•
with PC speaker capability
•
•
•
These legacy devices are described in other chapters. The PCI-to-ISA bridge and the
LPC interface to external devices are described in this chapter.
Figure 24-1. LPC Controller Covered in This Chapter
Table 24-1. References
Reference
Revision
Date
Document Title
LPC
Specification
1.1
Aug. 2000
Intel Low Pin Count (LPC) Interface Specification, Revision
1.1, Revision 1.1
PCI
Specification
3.0
Feb. 3, 2004
PCI Local Bus Specification
, Revision 3.0
I
O
Platform Controller Unit
UART
GP
IO
IO
RT
C
C
HP
E
E
T
82
59
59
I/
O A
P
IC
82
54
54
iLB
2
I
O
I
O
I
O
I
O
I
O
PMC
I
O
SMBus
0
I
O
LP
C
I
O
S
E
RI
RQ
I
O
SPI
I
O