Intel C2518 FH8065501516710 Ficha De Dados
Códigos do produto
FH8065501516710
Volume 2—8259 Programmable Interrupt Controller (PIC)—C2000 Product Family
Operation
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
556
Order Number: 330061-002US
29.3.8
Normal End of Interrupt
In normal EOI, the software writes an EOI command before leaving the interrupt
service routine to mark the interrupt as completed. The two forms of EOI commands
are: specific and non-specific. When a Non-specific EOI command is issued, the PIC
clears the highest ISR bit of those that are set to 1. A non-specific EOI is the normal
mode of operation of the PIC within the SoC, as the interrupt being serviced currently is
the interrupt entered with the interrupt acknowledge. When the PIC is operated in the
modes that preserve the fully-nested structure, the software determines which ISR bit
to clear by issuing a specific EOI.
An ISR bit that is masked is not cleared by a non-specific EOI if the PIC is in the special
mask mode. An EOI command must be issued for both the master and slave controller.
29.3.9
Automatic End of Interrupt Mode
In this mode, the PIC automatically performs a non-specific EOI operation at the
trailing edge of the last interrupt acknowledge pulse. From a system standpoint, this
mode is used only when a nested multi-level interrupt structure is not required within a
single PIC. The AEOI mode is only used in the master controller and not the slave
controller.
Note: