Intel E3845 FH8065301487715 Ficha De Dados
Códigos do produto
FH8065301487715
Intel
®
Atom™ Processor E3800 Product Family
3984
Datasheet
26.12.12 PME Control and Status Register (PMECTRLSTATUS)—Offset 84h
Access Method
Default: 00000008h
Type:
PCI Configuration Register
(Size: 32 bits)
Offset:
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Re
se
rv
ed
0
PME
S
TA
TUS
Re
se
rv
ed
1
PM
E
E
N
A
BL
E
Re
se
rv
ed
2
NO_SOF
T
_
R
E
SET
Re
se
rv
ed
3
PO
WERS
TA
TE
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
0000h
RO
Reserved0:
Reserved.
15
0h
RW/1C
PME Status (PMESTATUS):
•
•
0 = Software clears the bit by writing a 1 to it.
•
1 = This bit is set when the AHB Device would normally assert the PME# signal
independent of the state of the PME Enable bit (bit 8 in this register).
14:9
00h
RO
Reserved1:
Reserved.
8
0h
RW
PME Enable (PMEENABLE):
A 1 enables the function to assert PME#. When 0, PME#
message on SB is disabled.
7:4
0h
RO
Reserved2:
Reserved.
3
1h
RO
No_Soft_Reset (NO_SOFT_RESET):
This bit indicates that devices transitioning from
D3hot to D0 because of PowerState commands do not perform an internal reset.
Configuration Context is preserved.
2
0h
RO
Reserved3:
Reserved.
1:0
0h
RW
Power State (POWERSTATE):
This field is used both to determine the current power
state of the AHB IP and to set a new power state. The values are:
•
•
00 = D0 state
•
11 = D3HOT state
•
Others = Reserved
Notes: If software attempts to write a value of 01b or 10b in to this field, the write
operation must complete normally; however, the data is discarded and no state change
occurs. When in the D3HOT states, interrupts are blocked. D3Hot will not be used for
Downstream decode on fabric ports.