Intel E3815 FH8065301567411 Ficha De Dados

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FH8065301567411
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PCU – System Management Bus (SMBus)
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
4431
acknowledge, and the transaction times out, the SMB_Mem_HSTS.DEVERR bit is set. If 
software sets the SMB_Mem_HCTL.KILL bit while the command is running, the 
transaction will stop and the SMB_Mem_HSTS.FAILED bit will be set.
Quick Command
When programmed for a Quick Command, the Transmit Slave Address 
(SMB_Mem_TSA) register is sent. The PEC byte is never appended to the Quick 
Protocol. Software should force the SMB_Config_HCTL.PECEN bit to 0b when 
performing the Quick Command. Software must force the SMB_Config_HCFG.I2C_EN 
bit to 0b when running this command. See section 5.5.1 of the System Management 
Bus (SMBus) Specification, 
Version 2.0 for the format of the protocol.
Send Byte / Receive Byte
For the Send Byte command, the Transmit Slave Address (SMB_Mem_TSA) and Host 
Command (SMB_Mem_HCMD) registers are sent. For the Receive Byte command, the 
Transmit Slave Address (SMB_Mem_TSA) register is sent. The data received is stored in 
the Data 0 (SMB_Mem_HD0) register. Software must force the 
SMB_Config_HCFG.I2C_EN bit to 0b when running this command.
The Receive Byte is similar to a Send Byte, the only difference is the direction of data 
transfer. See sections 5.5.2 and 5.5.3 of the System Management Bus (SMBus) 
Specification, 
Version 2.0 for the format of the protocol.
Write Byte/Word
The first byte of a Write Byte/Word access is the command code. The next 1 or 2 bytes 
are the data to be written. When programmed for a Write Byte/Word command, the 
Transmit Slave Address (SMB_Mem_TSA), Host Command (SMB_Mem_HCMD), and 
Data 0 (SMB_Mem_HD0) registers are sent. In addition, the Data 1 (SMB_Mem_HD1) 
register is sent on a Write Word command. Software must force the 
SMB_Config_HCFG.I2C_EN bit to 0 when running this command. See section 5.5.4 of 
the System Management Bus (SMBus) Specification, Version 2.0 for the format of the 
protocol.
Read Byte/Word
Reading data is slightly more complicated than writing data. First the SoC must write a 
command to the slave device. Then it must follow that command with a repeated start 
condition to denote a read from that device's address. The slave then returns 1 or 2 
bytes of data. Software must force the SMB_Config_HCFG.I2C_EN bit to 0b when 
running this command.
When programmed for the read byte/word command, the Transmit Slave Address 
(SMB_Mem_TSA) and Host Command (SMB_Mem_HCMD) registers are sent. Data is 
received into the Data 0 (SMB_Mem_HD0) on the read byte, and the Data 0