IBM SA14-2339-04 Manual Do Utilizador

PPC405 Core User’s Manual

Load Halfword Algebraic Indexed

lhax
Load Halfword Algebraic Indexed

EA

←

(RA|0) + (RB)

(RT)

←

EXTS(MS(EA,2))

An effective address (EA) is formed by adding an index to a base address. The index is the contents
of register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise.

The halfword at the EA is sign-extended to 32 bits and placed into register RT.

If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.

• RT

• Reserved fields

This instruction is part of the PowerPC User Instruction Set Architecture.

RT, RA, RB

0

6

11

16

21

31