Freescale Semiconductor MCF52211 Manual Do Utilizador

Página de 576
UART Modules
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
24-7
 
24.3.3
UART Status Registers (USRn)
The USRregisters, shown in 
, show the status of the transmitter, the receiver, and the FIFO.
Table 24-4. UMR2n Field Descriptions
Field
Description
7–6
CM
Channel mode. Selects a channel mode
,” describes individual modes. 
00 Normal
01 Automatic echo
10 Local loopback
11 Remote loopback
5
TXRTS
Transmitter ready-to-send. Controls negation of URTSn to automatically terminate a message transmission. 
Attempting to program a receiver and transmitter in the same UART for URTSn control is not permitted and disables 
URTSn control for both. 
0 The transmitter has no effect on URTSn.
1 In applications where the transmitter is disabled after transmission completes, setting this bit automatically clears 
UOP[RTS] one bit time after any characters in the transmitter shift and holding registers are completely sent, 
including the programmed number of stop bits. 
4
TXCTS
Transmitter clear-to-send. If TXCTS and TXRTS are set, TXCTS controls the operation of the transmitter. 
0 UCTSn has no effect on the transmitter.
1  Enables clear-to-send operation. The transmitter checks the state of UCTSn each time it is ready to send a 
character. If UCTSn is asserted, the character is sent; if it is deasserted, the signal UTXDn remains in the high 
state and transmission is delayed until UCTSn is asserted. Changes in UCTSn as a character is being sent do 
not affect its transmission.
3–0
SB
Stop-bit length control. Selects length of stop bit appended to the transmitted character. Stop-bit lengths of 9/16 to 
2 bits are programmable for 6–8 bit characters. Lengths of 1-1/16 to 2 bits are programmable for 5-bit characters. In 
all cases, the receiver checks only for a high condition at the center of the first stop-bit position, one bit time after the 
last data bit or after the parity bit, if parity is enabled. If an external 1x clock is used for the transmitter, clearing bit 3 
selects one stop bit and setting bit 3 selects two stop bits for transmission. 
SB
5 Bits
6–8 Bits
SB
5–8 Bits
0000
1.063
0.563
1000
1.563
0001
1.125
0.625
1001
1.625
0010
1.188
0.688
1010
1.688
0011
1.250
0.750
1011
1.750
0100
1.313
0.813
1100
1.813
0101
1.375
0.875
1101
1.875
0110
1.438
0.938
1110
1.938
0111
1.500
1.000
1111
2.000