Fujitsu MB91191 Manual Do Utilizador

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The port has three registers per bit, namely DDR, PDR, and PFS, and port input/output setup and function

selection can be executed independently per bit. The peripheral function is selected for pins whose PFS is

"1", whereas the port function is selected for those whose PFS is "0". Pins whose DDR is "1" are set to

Output, whereas pins whose DDR is "0" are se to Input. 

The PFS is cleared to "0" by reset, and the port function is selected, the PDR is undefined, and the DDR is

cleared to "0" and set to Input.

In terms of the DDR specification per bit, for output setup, the value written to the PDR is output to the pin,

and the PDR contents are read as the read value of the PDR in this case. 

At the time of input setup, the pin will have high impedance status. At this time, the pin level is read from

the read value of the PDR. 

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Pin

PDR

PFS

DDR

Data register read

Pin

PDR

DDR

Data register read

PFS

P46 to P40
P87 to P80
P94 to P91

P90

Peripheral output

Peripheral output

Peripheral input