Fujitsu MB91191 Manual Do Utilizador

135

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The port has three registers per bit, namely, DDR, PDR, and PIE (port input enable register), and input/

output can be selected independently per bit. In terms of port input/output, pins whose DDR is "1" are set to

Output, whereas pins whose DDR is "0" are set to Input. To be used as a general-purpose port, port input is

enabled by setting "1" to the PIE.

The PIE is cleared to "0" by reset, and the port function is disabled. The PDR is undefined, and the DDR is

cleared to "0" and set to Input.

In terms of the DDR specification per bit, for output setup, the value written to the PDR is output to the pin,

and the PDR contents are read as the read value of the PDR in this case. 

At the time of input setup, the pin will have high impedance status. At this time, the pin level is read from

the read value of the PDR.

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Analog input

Pin

Key input (only Port A)

PDR

PIE

DDR

Data register read

PA7 to PA0
PB7 to PB0