Fujitsu MB91191 Manual Do Utilizador

Página de 348
197
10.6
Register of 8-/16-bit Timer/Counter
Register configuration/functions of 8-/16-bit timer/counter is shown. 
Timer Control Register 1 (TxCR1)
Figure 10.6-1  Timer control register 1(TxCR1) 
[bit7]:TIF1
It is compare match detection flag bit. 
[bit6]:TFCR1 
It is compare match detection flag clear bit. 
The read value of this bit is always "1". 
[bit5]:TIE1
It is interrupt enable bit of timer 1.
[bit4]: 
It is an unused bit.
[bit3]:TCS12
[bit2]:TCS11
7 6 5 4 3 2 1 0 
010- 0000
B
Initial value
bit
R
W
R/W
R/W
R/W
R/W
R/W
TIF1
TFCR1
TIE1
TCS12
TCS11
TCS10
TSTR1
Access
Compare match does not generate.
Compare match generates.
Clear compare match detection flag.
1 None
0 Interdiction
1 Permission