Fujitsu MB91191 Manual Do Utilizador
42
CHAPTER 3 CPU
3.8.1
Branch Command with Delay Slot
The operation with the delay slot branches prior to execute the command at the branch
destination after executing the command located immediately after the branch
command.
destination after executing the command located immediately after the branch
command.
■
Branch Command with Delay Slot
The following commands execute the branch command with delay slot.
JMP:D
@Ri
CALL:Dlabel12
CALL:D @Ri
RET:D
BRA:D label9
BNO:D label9
BEQ:D
label9
BNE:D label9
BC:D
label9
BNC:D label9
BN:D
label9
BP:D
label9
BV:D
label9
BNV:D label9
BLT:D
label9
BGE:D label9
BLE:D label9
BGT:D label9
BLS:D
label9
BHI:D label9
■
Operation of Branch Command with Delay Slot
Operations with delay slots branch out after executing the command placed just after the branch command
(called a "delay slot") prior to execute the branch destination command.
As the delay slot command is executed before the branch operation, the apparent execution speed is 1
cycle. The NOP command must be placed as an alternative if an effective command cannot be inserted in
the delay slot.
[example]
; Row of instruction
ADD
R1, R2
;
BRA:D
LABEL
; Branch instructions
MOV
R2, R3
; Delay slot ......Executed before branch
...
LABEL:STR 3 and @R4 ; The divergence ahead
The command placed in the delay slot is executed whether the branch condition for the condition branch
command will be realized or not.
For delay branch commands, the execution order of the partial command seems to be reversed, but this
applies only to PC update operations, and other operations (i.e. update and refer to register) are absolutely
executed in the described order.
Concrete examples are shown below.
●
The Ri to be referred to the JMP:D@Ri/CALL:D@Ri command will not be effected even if the command
within the delay slot updates the Ri.
[example]
LDI:32
#Label, R0
JMP:D
@R0
; Branches out to Label
LDI:8
#0,
R0
; No effects on the branch destination address
...