Intel 80C196NU Manual Do Utilizador
3-1
CHAPTER 3
ADVANCED MATH FEATURES
The 80C196NU is the first member of the MCS
®
96 microcontroller family to incorporate en-
hanced 16-bit multiplication instructions for performing multiply-accumulate operations and a
dedicated, 32-bit accumulator register for storing the results of these operations. The accumulator
and the enhanced instructions combine to decrease the amount of time required to perform mul-
tiply-accumulate operations. The instructions and accumulator support signed and unsigned inte-
gers as well as signed fractional data. This chapter describes the 80C196NU’s advanced
mathematical features.
dedicated, 32-bit accumulator register for storing the results of these operations. The accumulator
and the enhanced instructions combine to decrease the amount of time required to perform mul-
tiply-accumulate operations. The instructions and accumulator support signed and unsigned inte-
gers as well as signed fractional data. This chapter describes the 80C196NU’s advanced
mathematical features.
3.1
ENHANCED MULTIPLICATION INSTRUCTIONS
The 16-bit multiplication instructions, MULU and MUL, that exist for all MCS 96 microcontrol-
lers have been enhanced for the 80C196NU. The MULU instruction supports unsigned integers,
while the MUL instruction supports signed integers and signed fractionals.
lers have been enhanced for the 80C196NU. The MULU instruction supports unsigned integers,
while the MUL instruction supports signed integers and signed fractionals.
When you execute a 16-bit multiplication instruction with a destination address that is 0FH or
below, the 80C196NU automatically stores the result in the accumulator. If bit 3 of the destination
address is set (address 08H, 09H, …, 0FH), the 80C196NU clears the accumulator before it stores
the result of the current instruction. If bit 3 of the destination address is clear (address 00H, 01H,
…, 07H), it adds the result of the current instruction to the existing contents of the accumulator.
below, the 80C196NU automatically stores the result in the accumulator. If bit 3 of the destination
address is set (address 08H, 09H, …, 0FH), the 80C196NU clears the accumulator before it stores
the result of the current instruction. If bit 3 of the destination address is clear (address 00H, 01H,
…, 07H), it adds the result of the current instruction to the existing contents of the accumulator.
This simple example illustrates the results of consecutive multiply-accumulate instructions. The
results of the first three instructions are automatically added together in the accumulator, while
the last instruction clears the accumulator before the result is stored.
results of the first three instructions are automatically added together in the accumulator, while
the last instruction clears the accumulator before the result is stored.
register_1 = 10 decimal (0AH),register_2 = 20 decimal (14H)
register_3 = 30 decimal (1EH),register_4 = 40 decimal (28H)
register_3 = 30 decimal (1EH),register_4 = 40 decimal (28H)
mul 00H,register_1,register_2 ;10
×
20= 200. Accumulator = 200 decimal.
mul 00H,register_3,register_4 ;30
×
40=1200. Accumulator =1400 decimal.
mul 00H,register_2,register_4 ;20
×
40= 800. Accumulator =2200 decimal.
mul 08H,register_2,register_3 ;20
×
30= 600. Accumulator = 600 decimal.
Table 3-1 compares the instructions required to perform a multiply-accumulate operation for the
8XC196NP and those required for the 80C196NU. The 8XC196NP requires four instructions,
while the 80C196NU requires only one to accomplish the same operation. The four 8XC196NP
instructions take a total of 32 state times to execute, while the single 80C196NU instruction takes
only 16 state times. In addition, the 80C196NU can operate at twice the frequency of the
8XC196NP; therefore, a state time for the 80C196NU is half that of the 8XC196NP. These two
factors combine to make the 80C196NU code execute in one-fourth the time required for the
8XC196NP code.
8XC196NP and those required for the 80C196NU. The 8XC196NP requires four instructions,
while the 80C196NU requires only one to accomplish the same operation. The four 8XC196NP
instructions take a total of 32 state times to execute, while the single 80C196NU instruction takes
only 16 state times. In addition, the 80C196NU can operate at twice the frequency of the
8XC196NP; therefore, a state time for the 80C196NU is half that of the 8XC196NP. These two
factors combine to make the 80C196NU code execute in one-fourth the time required for the
8XC196NP code.