Manual Do Utilizador (BX80623G465)índice analíticoContents3Revision History7Introduction 191.1 Terminology91.1.1 Processor Packaging Terminology101.2 References11Electrical Specifications 2132.1 System Bus and GTLREF132.2 Power and Ground Pins132.3 Decoupling Guidelines132.3.1 VCC Decoupling142.3.2 System Bus AGTL+ Decoupling142.3.3 System Bus Clock (BCLK[1:0]) and Processor Clocking142.4 Voltage Identification152.4.1 Phase Lock Loop (PLL) Power and Filter162.5 Reserved, Unused Pins, and TESTHI[12:0]182.6 System Bus Signal Groups192.7 Asynchronous GTL+ Signals202.8 Test Access Port (TAP) Connection202.9 System Bus Frequency Select Signals (BSEL[1:0])202.10 Maximum Ratings212.11 Processor DC Specifications212.11.1 Flexible Motherboard Guidelines (FMB)212.12 AGTL+ System Bus Specifications282.13 System Bus AC Specifications292.14 Processor AC Timing Waveforms32System Bus Signal Quality Specifications 3413.1 System Bus Clock (BCLK) Signal Quality Specifications413.2 System Bus Signal Quality Specifications and Measurement Guidelines423.3 System Bus Signal Quality Specifications and Measurement Guidelines453.3.1 Overshoot/Undershoot Guidelines453.3.2 Overshoot/Undershoot Magnitude453.3.3 Overshoot/Undershoot Pulse Duration453.3.4 Activity Factor463.3.5 Reading Overshoot/Undershoot Specification Tables463.3.6 Conformance Determination to Overshoot/Undershoot Specifications47Package Mechanical Specifications 4514.1 Package Load Specifications544.2 Processor Insertion Specifications554.3 Processor Mass Specifications554.4 Processor Materials554.5 Processor Markings55Pin Listing and Signal Definitions 5595.1 Processor Pin Assignments595.2 Alphabetical Signals Reference72Thermal Specifications and Design Considerations 6816.1 Processor Thermal Specifications826.1.1 Thermal Specifications826.1.2 Thermal Metrology836.1.2.1 Processor Case Temperature Measurement83Features 7857.1 Power-On Configuration Options857.2 Clock Control and Low Power States857.2.1 Normal State—State 1857.2.2 AutoHALT Powerdown State—State 2867.2.3 Stop-Grant State—State 3877.2.4 HALT/Grant Snoop State—State 4877.2.5 Sleep State—State 5887.3 Thermal Monitor887.3.1 Thermal Diode90Boxed Processor Specifications 8918.1 Introduction918.2 Mechanical Specifications928.2.1 Boxed Processor Cooling Solution Dimensions928.2.2 Boxed Processor Fan Heatsink Weight938.2.3 Boxed Processor Retention Mechanism and Heatsink Assembly938.3 Electrical Requirements948.3.1 Fan Heatsink Power Supply948.4 Thermal Specifications978.4.1 Boxed Processor Cooling Requirements978.4.2 Variable Speed Fan98Debug Tools Specifications 91019.1 Logic Analyzer Interface (LAI)1019.1.1 Mechanical Considerations1019.1.2 Electrical Considerations101Tamanho: 4 MBPáginas: 102Language: EnglishAbrir o manual
Manual Do Utilizador (CM8062301264500)índice analíticoContents3Revision History7Introduction 191.1 Terminology91.1.1 Processor Packaging Terminology101.2 References11Electrical Specifications 2132.1 System Bus and GTLREF132.2 Power and Ground Pins132.3 Decoupling Guidelines132.3.1 VCC Decoupling142.3.2 System Bus AGTL+ Decoupling142.3.3 System Bus Clock (BCLK[1:0]) and Processor Clocking142.4 Voltage Identification152.4.1 Phase Lock Loop (PLL) Power and Filter162.5 Reserved, Unused Pins, and TESTHI[12:0]182.6 System Bus Signal Groups192.7 Asynchronous GTL+ Signals202.8 Test Access Port (TAP) Connection202.9 System Bus Frequency Select Signals (BSEL[1:0])202.10 Maximum Ratings212.11 Processor DC Specifications212.11.1 Flexible Motherboard Guidelines (FMB)212.12 AGTL+ System Bus Specifications282.13 System Bus AC Specifications292.14 Processor AC Timing Waveforms32System Bus Signal Quality Specifications 3413.1 System Bus Clock (BCLK) Signal Quality Specifications413.2 System Bus Signal Quality Specifications and Measurement Guidelines423.3 System Bus Signal Quality Specifications and Measurement Guidelines453.3.1 Overshoot/Undershoot Guidelines453.3.2 Overshoot/Undershoot Magnitude453.3.3 Overshoot/Undershoot Pulse Duration453.3.4 Activity Factor463.3.5 Reading Overshoot/Undershoot Specification Tables463.3.6 Conformance Determination to Overshoot/Undershoot Specifications47Package Mechanical Specifications 4514.1 Package Load Specifications544.2 Processor Insertion Specifications554.3 Processor Mass Specifications554.4 Processor Materials554.5 Processor Markings55Pin Listing and Signal Definitions 5595.1 Processor Pin Assignments595.2 Alphabetical Signals Reference72Thermal Specifications and Design Considerations 6816.1 Processor Thermal Specifications826.1.1 Thermal Specifications826.1.2 Thermal Metrology836.1.2.1 Processor Case Temperature Measurement83Features 7857.1 Power-On Configuration Options857.2 Clock Control and Low Power States857.2.1 Normal State—State 1857.2.2 AutoHALT Powerdown State—State 2867.2.3 Stop-Grant State—State 3877.2.4 HALT/Grant Snoop State—State 4877.2.5 Sleep State—State 5887.3 Thermal Monitor887.3.1 Thermal Diode90Boxed Processor Specifications 8918.1 Introduction918.2 Mechanical Specifications928.2.1 Boxed Processor Cooling Solution Dimensions928.2.2 Boxed Processor Fan Heatsink Weight938.2.3 Boxed Processor Retention Mechanism and Heatsink Assembly938.3 Electrical Requirements948.3.1 Fan Heatsink Power Supply948.4 Thermal Specifications978.4.1 Boxed Processor Cooling Requirements978.4.2 Variable Speed Fan98Debug Tools Specifications 91019.1 Logic Analyzer Interface (LAI)1019.1.1 Mechanical Considerations1019.1.2 Electrical Considerations101Tamanho: 4 MBPáginas: 102Language: EnglishAbrir o manual
