Manuais de utilizador para Lucent Technologies MN10285K

índice analítico

• Cover

  1
• Contents

  4
• List of Tables

  10
• List of Figures

  12
• About This Manual

  17
  • Using This Manual

    17
  • Text Conventions

    17
  • Register Conventions

    17
  • Related Documents

    18
  • Questions and Comments

    18
• 1 General Description

  19
  • 1.1 MN102H Series Overview

    19
  • 1.2 MN102H Series Features

    19
  • 1.3 MN102H Series Description

    22
  • 1.4 General Specifications

    27
  • 1.5 Block Diagram

    29
  • 1.6 Pin Descriptions

    31
    • 1.6.1 MN102H85K Pin Description

      31
    • 1.6.2 MN102H75K Pin Description

      32
  • 1.7 Bus Interface

    36
    • 1.7.1 Description

      36
    • 1.7.2 Bus Interface Control Registers

      37
• 2 Interrupts

  38
  • 2.1 Description

    38
  • 2.2 Interrupt Setup Examples

    41
    • 2.2.1 Setting Up an External Pin Interrupt

      41
    • 2.2.2 Setting Up a Watchdog Timer Interrupt

      43
  • 2.3 Interrupt Control Registers

    45
• 3 Low-Power Modes

  73
  • 3.1 CPU Modes

    73
    • 3.1.1 Description

      73
    • 3.1.2 Exiting from SLOW Mode to NORMAL Mode

      74
    • 3.1.3 Notes on Invoking and Exiting STOP and HALT Modes

      75
  • 3.2 Turning Individual Functions On and Off

    76
  • 3.3 CPU Control Register

    77
• 4 Timers

  78
  • 4.1 8-Bit Timer Description

    78
  • 4.2 8-Bit Timer Features

    79
  • 4.3 8-Bit Timer Block Diagrams

    80
  • 4.4 8-Bit Timer Timing

    82
  • 4.5 8-Bit Timer Setup Examples

    83
    • 4.5.1 Setting Up an Event Counter Using Timer 0

      83
    • 4.5.2 Setting Up an Interval Timer Using Timers 1 and 2

      85
  • 4.6 8-Bit Timer Control Registers

    88
  • 4.7 16-Bit Timer Description

    89
  • 4.8 16-Bit Timer Features

    90
  • 4.9 16-Bit Timer Block Diagrams

    91
  • 4.10 16-Bit Timer Timing

    91
  • 4.11 16-Bit Timer Setup Examples

    95
    • 4.11.1 Setting Up an Event Counter Using Timer 4

      95
    • 4.11.2 Setting Up a Single-Phase PWM Output Signal Using Timer 4

      97
    • 4.11.3 Setting Up a Two-Phase PWM Output Signal Using Timer 4

      102
    • 4.11.4 Setting Up a Single-Phase Capture Input Using Timer 4

      107
    • 4.11.5 Setting Up a Two-Phase Capture Input Using Timer 4

      109
    • 4.11.6 Setting Up a 4x Two-Phase Encoder Input Using Timer 5

      112
    • 4.11.7 Setting Up a 1x Two-Phase Encoder Input Using Timer 5

      115
    • 4.11.8 Setting Up a One-Shot Pulse Output Using Timer 5

      118
    • 4.11.9 Setting Up an External Count Direction Controller Using Timer 5

      121
    • 4.11.10 Setting Up External Reset Control Using Timer 5

      124
  • 4.12 16-Bit Timer Control Registers

    126
• 5 Serial Interfaces

  128
  • 5.1 Description

    128
  • 5.2 Features

    128
  • 5.3 Connecting the Serial Interfaces

    129
    • 5.3.1 Synchronous Serial Mode Connections

      129
    • 5.3.2 UART Mode Connections

      129
    • 5.3.3 I2C Mode Connection

      129
  • 5.4 UART Mode Baud Rates

    130
  • 5.5 Serial Interface Timing

    130
    • 5.5.1 Synchronous Serial Mode Timing

      130
    • 5.5.2 UART Mode Timing

      131
  • 5.6 Serial Interface Setup Examples

    132
    • 5.6.1 Setting Up UART Transmission Using Serial Interface 0

      132
    • 5.6.2 Setting Up Synchronous Serial Reception Using Serial Interface 0

      135
    • 5.6.3 Setting Up the Serial Interface Clock

      136
    • 5.6.4 Setting Up I2C Transmission Using Serial Interface 0

      138
    • 5.6.5 Setting Up I2C Reception Using Serial Interface 0

      140
  • 5.7 Serial Interface Control Registers

    141
• 6 Analog-to-Digital Converter

  144
  • 6.1 Description

    144
  • 6.2 Features

    144
  • 6.3 Block Diagram

    145
  • 6.4 A/D Conversion Timing

    145
    • 6.4.1 Selecting the ADC Clock Source

      145
    • 6.4.2 Single Channel/Single Conversion Timing

      146
    • 6.4.3 Multiple Channel/Single Conversion Timing

      146
    • 6.4.4 Single Channel/Continuous Conversion Timing

      147
    • 6.4.5 Multiple Channel/Continuous Conversion Timing

      147
  • 6.5 ADC Setup Examples

    148
    • 6.5.1 Setting Up Software-Controlled Single-Channel A/D Conversion

      148
    • 6.5.2 Setting Up Hardware-Controlled Intermittent Three-Channel A/D Conversion

      149
  • 6.6 ADC Control Registers

    151
  • 6.7 Cautions about Analog-to-Digital Converter

    153
• 7 On-Screen Display

  154
  • 7.1 Description

    154
  • 7.2 Features

    154
  • 7.3 Block Diagram

    155
  • 7.4 Power-Saving Considerations in the OSD Block

    156
  • 7.5 OSD Operation

    157
    • 7.5.1 OSD Clock

      157
    • 7.5.2 External Input Sync Signals

      157
    • 7.5.3 Multi-Layer Format

      157
    • 7.5.4 Output Pin Setup

      158
    • 7.5.5 Microcontroller Interface

      158
    • 7.5.6 VRAM

      158
    • 7.5.7 Conditions for VRAM Writes

      159
  • 7.6 Standard and Extended Display Modes

    160
    • 7.6.1 Cursor Layer Display Modes

      160
    • 7.6.2 Graphics Layer Display Modes

      161
  • 7.7 Display Setup Examples

    162
    • 7.7.1 Setting Up the Graphics Layer

      162
    • 7.7.2 Setting Up the Text Layer

      164
  • 7.8 VRAM

    166
    • 7.8.1 VRAM Operation

      166
    • 7.8.2 VRAM Organization

      170
    • 7.8.3 Cautions about the number of display code set to VRAM

      172
  • 7.9 ROM

    173
    • 7.9.1 ROM Organization

      173
    • 7.9.2 Graphics ROM Organization in Different Color Modes

      174
  • 7.10 Setting Up the OSD

    179
    • 7.10.1 Setting Up the OSD Display Colors

      179
    • 7.10.2 Text Layer Functions

      185
    • 7.10.3 Display Sizes

      188
    • 7.10.4 Setting Up the OSD Display Position

      190
  • 7.11 DMA and Interrupt Timing

    192
  • 7.12 Selecting the OSD Dot Clock

    194
  • 7.13 Controlling the Shuttering Effect

    195
    • 7.13.1 Controlling the Shuttered Area

      195
    • 7.13.2 Controlling Shutter Movement

      197
    • 7.13.3 Controlling Shuttering Effects

      199
    • 7.13.4 Controlling Line Shuttering

      201
  • 7.14 Field Detection Circuit

    202
    • 7.14.1 Block Diagram

      202
    • 7.14.2 Description

      202
    • 7.14.3 Considerations for Interlaced Displays

      203
  • 7.15 OSD Registers

    204
• 8 IR Remote Signal Receiver

  217
  • 8.1 Description

    217
  • 8.2 Block Diagram

    218
  • 8.3 IR Remote Signal Receiver Operation

    219
    • 8.3.1 Operating Modes

      219
    • 8.3.2 Noise Filter

      219
    • 8.3.3 8-Bit Data Reception

      220
    • 8.3.4 Identifying the Data Format

      221
    • 8.3.5 Generating Interrupts

      222
      • 8.3.5.1 Leader Detection

        222
      • 8.3.5.2 Trailer Detection

        222
      • 8.3.5.3 8-Bit Data Reception Detection

        222
      • 8.3.5.4 Pin Edge Detection

        222
    • 8.3.6 Controlling the SLOW Mode

      223
  • 8.4 IR Remote Signal Receiver Control Registers

    224
• 9 Closed-Caption Decoder

  228
  • 9.1 Description

    228
  • 9.2 Block Diagram

    228
  • 9.3 Functional Description

    229
    • 9.3.1 Analog-to-Digital Converter

      229
    • 9.3.2 Clamping Circuit

      230
    • 9.3.3 Sync Separator Circuit

      231
      • 9.3.3.1 HSYNC Separator

        233
      • 9.3.3.2 VSYNC Separator

        234
      • 9.3.3.3 Field Detection Circuit

        234
    • 9.3.4 Data Slicer

      234
    • 9.3.5 Controller and Sampling Circuit

      235
      • 9.3.5.1 CRI Detection for Sampling Clock Generation

        236
      • 9.3.5.2 Data Capture Control

        236
  • 9.4 Closed-Caption Decoder Registers

    237
• 10 Pulse Width Modulator

  250
  • 10.1 Description

    250
  • 10.2 Block Diagram

    251
  • 10.3 PWM Data Registers

    251
• 11 I/O Ports

  252
  • 11.1 Description

    252
  • 11.2 I/O Port Circuit Diagrams

    253
  • 11.3 I/O Port Control Registers

    278
• 12 ROM Correction

  289
  • 12.1 Description

    289
  • 12.2 Block Diagram

    290
  • 12.3 Programming Considerations

    290
  • 12.4 ROM Correction Control Registers

    291
• 13 I2C Bus Controller

  294
  • 13.1 Description

    294
  • 13.2 Block Diagram

    297
  • 13.3 Functional Description

    297
  • 13.4 Setting Up the I2C Bus Connection

    299
  • 13.5 SDA and SCL Waveform Characteristics

    300
  • 13.6 I2C Interface Setup Examples

    301
    • 13.6.1 Setting Up a Transition from Master Transmitter to Master Receiver

      301
      • 13.6.1.1 Pre-configuring

        301
      • 13.6.1.2 Setting Up the First Interrupt

        301
      • 13.6.1.3 Setting Up the Second Interrupt

        302
      • 13.6.1.4 Setting Up the Third Interrupt

        302
    • 13.6.2 Setting Up a Transition from Slave Receiver to Slave Transmitter

      303
      • 13.6.2.1 Pre-configuring

        303
      • 13.6.2.2 Setting Up the First Interrupt

        303
      • 13.6.2.3 Setting Up the Second Interrupt

        304
      • 13.6.2.4 Setting Up the Third Interrupt

        304
  • 13.7 I2C Bus Interface Registers

    305
• 14 H Counter

  308
  • 14.1 Description

    308
  • 14.2 Block Diagram

    308
  • 14.3 H Counter Operation

    308
  • 14.4 H Counter Control Registers

    311
• Appendix A Register Map

  313
• Appendix B MN102HF75K Flash EEPROM Version

  317
  • B.1 Description

    317
  • B.2 Benefits

    318
  • B.3 Using the PROM Writer Mode

    318
  • B.4 Using the Onboard Serial Programming Mode

    320
    • B.4.1 Configuring the System for Onboard Serial Programming

      321
    • B.4.2 Circuit Requirements for the Target Board

      322
    • B.4.3 Microcontroller Hardware Used in Onboard Serial Programming

      323
      • B.4.3.1 Serial Writer Interface Description

        323
      • B.4.3.2 Serial Writer Interface Block Diagram

        323
    • B.4.4 Microcontroller Memory Map Used During Onboard Serial Programming

      324
      • B.4.4.1 Flash ROM Address Space

        324
      • B.4.4.2 RAM Address Space

        325
    • B.4.5 Microcontroller Clock on the Target Board

      325
    • B.4.6 Setting Up the Onboard Serial Programming Mode

      326
    • B.4.7 Branching to the User Program

      328
      • B.4.7.1 Branching to the Reset Start Routine

        328
      • B.4.7.2 Branching to the Interrupt Start Routine

        328
  • B.5 Reprogramming Flow

    329
  • B.6 Programming Times

    329
• Record of Changes

  330
• Colophon

  337
• Sales Offices

  338