Manual Do Utilizadoríndice analíticoPreface5Introduction5Document Layout5Conventions Used in this Guide6Recommended Reading6The Microchip Web Site7Customer Support7Document Revision History7Chapter 1. Quick Start Instructions91.1 Introduction91.2 Description of the MCP4728 Evaluation Board91.3 Getting Started with PICkit Serial Analyzer11Appendix A. Schematic and Layouts39A.1 Introduction39A.2 Board – Schematic40A.3 Board – Top Silk, Top Pads and Top Copper41A.4 Board – Top Copper and Pads42A.5 Board – Top Pads and Silk43A.6 Board – Bottom Copper Layer44Appendix B. Bill Of Materials (BOM)45Appendix C. MCP4728 Read/Write Commands47C.1 Introduction47Worldwide Sales and Service50Tamanho: 800 KBPáginas: 50Language: EnglishAbrir o manual
Ficha De Dadosíndice analítico1.0 Electrical Characteristics3FIGURE 1-1: I2C Bus Timing Data.7FIGURE 1-2: LDAC Pin Timing vs. VOUT Update.72.0 Typical Performance Curves11FIGURE 2-1: INL vs. Code (TA = +25°C).11FIGURE 2-2: INL vs. Code (TA = +25°C).11FIGURE 2-3: INL vs. Code (TA = +25°C).11FIGURE 2-4: DNL vs. Code (TA = +25°C).11FIGURE 2-5: DNL vs. Code (TA = +25°C).11FIGURE 2-6: DNL vs. Code (TA = +25°C).11FIGURE 2-7: INL vs. Code (TA = +25°C).12FIGURE 2-8: INL vs. Code (TA = +25°C).12FIGURE 2-9: INL vs. Code and Temperature.12FIGURE 2-10: DNL vs. Code (TA = +25°C).12FIGURE 2-11: DNL vs. Code (TA = +25°C).12FIGURE 2-12: DNL vs. Code and Temperature.12FIGURE 2-13: INL vs. Code and Temperature.13FIGURE 2-14: INL vs. Code and Temperature.13FIGURE 2-15: INL vs. Code and Temperature.13FIGURE 2-16: DNL vs. Code and Temperature.13FIGURE 2-17: DNL vs. Code and Temperature.13FIGURE 2-18: DNL vs. Code and Temperature.13FIGURE 2-19: INL vs. Code and Temperature.14FIGURE 2-20: Full Scale Error vs. Temperature (Code = FFFh, VREF = Internal).14FIGURE 2-21: Full Scale Error vs. Temperature (Code = FFFh, VREF = VDD).14FIGURE 2-22: DNL vs. Code and Temperature.14FIGURE 2-23: Zero Scale Error vs. Temperature (Code = 000h, VREF = Internal).14FIGURE 2-24: Offset Error (Zero Scale Error).14FIGURE 2-25: Absolute DAC Output Error (VDD = 5.5V).15FIGURE 2-26: Full Scale Settling Time (VREF = VDD, VDD = 5V, UDAC = 1, Code Change: 000h to FFFh).15FIGURE 2-27: Half Scale Settling Time (VREF = VDD, VDD = 5V, UDAC = 1, Code Change: 000h to 7FFh).15FIGURE 2-28: Full Scale Settling Time (VREF = Internal, VDD = 5V, UDAC = 1, Gain = x1, Code Change: 000h to FFFh).15FIGURE 2-29: Full Scale Settling Time (VREF = VDD, VDD = 5V, UDAC = 1, Code Change: FFFh to 000h).15FIGURE 2-30: Half Scale Settling Time (VREF = VDD, VDD = 5V, UDAC = 1, Code Change: 7FFh to 000h).15FIGURE 2-31: Full Scale Settling Time (VREF = Internal, VDD = 5V, UDAC = 1, Gain = x1, Code Change: FFFh to 000h).16FIGURE 2-32: Half Scale Settling Time (VREF = Internal, VDD = 5V, UDAC = 1, Gain = x1, Code Change: 000h to 7FFh).16FIGURE 2-33: Exiting Power Down Mode (Code: FFFh, VREF = Internal, VDD = 5V, Gain = x1, for all Channels.).16FIGURE 2-34: Entering Power Down Mode (Code: FFFh, VREF = Internal, VDD = 5V, Gain = x1, PD1= PD0 = 1, No External Load).16FIGURE 2-35: Half Scale Settling Time (VREF = Internal, VDD = 5V, UDAC = 1, Gain = x1, Code Change: 7FFh to 000h).16FIGURE 2-36: Exiting Power Down Mode (Code: FFFh, VREF = VDD, VDD = 5V, for all Channels).16FIGURE 2-37: Entering Power Down Mode (Code: FFFh, VREF = VDD, VDD = 5V, PD1= PD0 = 1, No External Load).17FIGURE 2-38: VOUT Time Delay when VREF changes from Internal Reference to VDD.17FIGURE 2-39: VOUT Time Delay when VREF changes from VDD to Internal Reference.17FIGURE 2-40: Channel Cross Talk (VREF = VDD, VDD = 5V).17FIGURE 2-41: Code Change Glitch (VREF = External, VDD = 5V, No External Load), Code Change: 800h to 7FFh.17FIGURE 2-42: Code Change Glitch (VREF = Internal, VDD = 5V, Gain = 1, No External Load), Code Change: 800h to 7FFh.17FIGURE 2-43: VOUT vs. Resistive Load.18FIGURE 2-44: IDD vs. Temperature (VREF = Vdd, VDD = 5V, Code = FFFh).18FIGURE 2-45: IDD vs. Temperature (VREF = VDD, VDD = 2.7V, Code = FFFh).18FIGURE 2-46: IDD vs. Temperature (VREF = VDD, All channels are in Normal Mode, Code = FFFh).18FIGURE 2-47: IDD vs. Temperature (VREF = Internal, VREF = 5V, Code = FFFh).18FIGURE 2-48: IDD vs. Temperature (VREF = Internal, VDD = 2.7V, Code = FFFh).18FIGURE 2-49: IDD vs. Temperature (VREF = Internal , All Channels are in Normal Mode, Code = FFFh).19FIGURE 2-50: IDD vs. Temperature (VREF = Internal , All Channels are in Powered Down).19FIGURE 2-51: Source Current Capability (VREF = VDD, Code = FFFh).19FIGURE 2-52: Sink Current Capability (VREF = VDD, Code = 000h).193.0 Pin Descriptions21TABLE 3-1: Pin Function Table213.1 Supply Voltage Pins (VDD, VSS)213.2 Serial Clock Pin (SCL)213.3 Serial Data Pin (SDA)223.4 LDAC Pin223.5 RDY/BSY Status Indicator Pin223.6 Analog Output Voltage Pins (VOUT A, VOUT B, VOUT C, VOUT D)224.0 Theory of Device Operation234.1 Power-on Reset (POR)234.2 Reset Conditions234.3 Output Amplifier234.4 DAC Input Registers and Non-Volatile EEPROM Memory24TABLE 4-1: Input Register MAP (Volatile)24TABLE 4-2: EEPROM Memory MAP and FACTORY DEFAULT Settings24TABLE 4-3: Configuration Bits254.5 Voltage Reference264.6 LSB Size26TABLE 4-4: LSB SIZES (example)264.7 DAC Output Voltage264.8 Output Voltage Update26TABLE 4-5: LDAC and UDAC conditions Vs. Output Update274.9 DAC Input Code Vs. DAC Analog Output27TABLE 4-6: DAC Input Code Vs. Analog Output (VOUT)274.10 Normal and Power-Down Modes28TABLE 4-7: Power-down bits28FIGURE 4-1: Output Stage for Power-Down Mode.285.0 I2C Serial Interface Communications295.1 Overview of I2C Serial Interface Communications295.2 I2C BUS CHARACTERISTICS29FIGURE 5-1: Data Transfer Sequence On The Serial Bus.305.3 MCP4728 Device Addressing30FIGURE 5-2: Device Addressing.305.4 I2C General Call Commands31FIGURE 5-3: General Call Reset.31FIGURE 5-4: General Call Wake-Up.31FIGURE 5-5: General Call Software Update.32FIGURE 5-6: General Call Read I2C Address.335.5 Writing and Reading Registers and EEPROM345.6 Write Commands for DAC Registers and EEPROM34TABLE 5-1: Write Command Types34TABLE 5-2: DAC Channel Selection Bits for Sequential Write Command36FIGURE 5-7: Fast Write Command: Write DAC Input Registers Sequentially from Channel A to D.38FIGURE 5-8: Multi-Write Command: Write Multiple DAC Input Registers.39FIGURE 5-9: Sequential Write Command: Write DAC Input Registers and EEPROM Sequentially from Starting Channel to Channel D. The sequential input register starts with the "Starting Channel" and ends at Channel D. For example, if DAC1:DAC0 = 00, then i...40FIGURE 5-10: Single Write Command: Write to a Single DAC Input Register and EEPROM.41FIGURE 5-11: Write Command: Write I2C Address Bits to the DAC Registers and EEPROM.42FIGURE 5-12: Write Command: Write Voltage Reference Selection Bit (VREF) to the DAC Input Registers.43FIGURE 5-13: Write Command: Write Power-Down Selection Bits (PD1, PD0) to the DAC Input Registers. See Table 4-7 for the power-down bit setting.43FIGURE 5-14: Write Command: Write Gain Selection Bit (GX) to the DAC Input Registers.44FIGURE 5-15: Read Command and Device Outputs.456.0 Terminology476.1 Resolution476.2 Least Significant Bit (LSB)476.3 Integral Nonlinearity (INL)47FIGURE 6-1: INL Accuracy.476.4 Differential Nonlinearity (DNL)47FIGURE 6-2: DNL Accuracy.486.5 Offset Error48FIGURE 6-3: Offset Error.486.6 Gain Error486.7 Full Scale Error (FSE)48FIGURE 6-4: Gain Error and Full Scale Error.486.8 Gain Error Drift486.9 Offset Error Drift496.10 Settling Time496.11 Major-Code Transition Glitch496.12 Digital Feedthrough496.13 Analog Crosstalk496.14 DAC-to-DAC Crosstalk496.15 Power-Supply Rejection Ratio (PSRR)497.0 Typical Applications517.1 Connecting to I2C BUS Using Pull-Up Resistors51FIGURE 7-1: Example of the MCP4728 Device Connection.51FIGURE 7-2: I2C Bus Connection Test.527.2 Layout Considerations527.3 Power Supply Considerations527.4 Using Power Saving Feature527.5 Using Nonvolatile EEPROM Memory527.6 Application Examples53TABLE 7-1: Example: Setting Vout of each channel53FIGURE 7-3: Using the MCP4728 for Set Point or Threshold Calibration.54FIGURE 7-4: Sequential Write Command for Setting Test Points in Figure 7-3.55FIGURE 7-5: Example of Writing Fast Write Command for Various VOUT. VREF = VDD For All Channels.568.0 Development Support578.1 Evaluation & Demonstration Boards57FIGURE 8-1: MCP4728 Evaluation Board.57FIGURE 8-2: Setup for the MCP4728 Evaluation Board with PICkit™ Serial Analyzer.57FIGURE 8-3: Example of PICkit™ Serial User Interface.579.0 Packaging Information599.1 Package Marking Information59Corporate Office68Atlanta68Boston68Chicago68Cleveland68Fax: 216-447-064368Dallas68Detroit68Kokomo68Toronto68Fax: 852-2401-343168Australia - Sydney68China - Beijing68China - Shanghai68India - Bangalore68Korea - Daegu68Korea - Seoul68Singapore68Taiwan - Taipei68Fax: 43-7242-2244-39368Denmark - Copenhagen68France - Paris68Germany - Munich68Italy - Milan68Spain - Madrid68UK - Wokingham68Worldwide Sales and Service68Trademarks67Worldwide Sales68Tamanho: 3 MBPáginas: 68Language: EnglishAbrir o manual
