Manuais de utilizador para Panasonic F77G

índice analítico

• Cover

  1
• Precautions

  3
• About This Manual

  4
• All Doors

  7
• Contents

  8
• Chapter 1 Overview

  19
  • 1-1 Overview

    20
    • 1-1-1 Overview

      20
    • 1-1-2 Product Summary

      20
  • 1-2 Hardware Functions

    21
  • 1-3 Pin Description

    27
    • 1-3-1 Pin Configuration

      27
    • 1-3-2 Pin Specification

      28
    • 1-3-3 Pin Functions

      29
  • 1-4 Block Diagram

    35
    • 1-4-1 Block Diagram

      35
  • 1-5 Electrical Characteristics

    36
    • 1-5-1 Absolute Maximum Ratings*

      36
    • 1-5-2 Operating Conditions

      37
    • 1-5-3 DC Characteristics

      40
    • 1-5-4 A/D Converter Characteristics

      44
    • 1-5-5 D/A Converter Characteristics

      45
  • 1-6 Precautions

    46
    • 1-6-1 General Usage

      46
    • 1-6-2 Unused Pins

      47
    • 1-6-3 Power Supply

      49
    • 1-6-4 Power Supply Circuit

      50
  • 1-7 Package Dimension

    51
• Chapter 2 CPU Basics

  53
  • 2-1 Overview

    54
    • 2-1-1 Block Diagram

      55
    • 2-1-2 CPU Control Registers

      56
    • 2-1-3 Instruction Execution Controller

      57
    • 2-1-4 Pipeline Process

      58
    • 2-1-5 Registers for Address

      58
    • 2-1-6 Registers for Data

      59
    • 2-1-7 Processor Status Word

      60
    • 2-1-8 Addressing Modes

      62
  • 2-2 Memory Space

    64
    • 2-2-1 Memory Mode

      64
    • 2-2-2 Single-chip Mode

      65
    • 2-2-3 Special Function Registers

      66
  • 2-3 Bus Interface

    67
    • 2-3-1 Bus Controller

      67
    • 2-3-2 Control Registers

      68
  • 2-4 Standby Function

    71
    • 2-4-1 Overview

      71
    • 2-4-2 CPU Mode Control Register

      73
    • 2-4-3 Transition between SLOW and NORMAL

      74
    • 2-4-4 Transition to STANDBY Modes

      75
  • 2-5 Clock Switching

    77
  • 2-6 Bank Function

    79
    • 2-6-1 Overview

      79
    • 2-6-2 Bank Setting

      79
    • 2-6-3 Bank Memory Space

      81
  • 2-7 ROM Correction

    82
    • 2-7-1 Overview

      82
    • 2-7-2 Correction Sequence

      82
    • 2-7-3 ROM Correction Control Register

      84
    • 2-7-4 ROM Correction Setup Example

      87
  • 2-8 Reset

    90
    • 2-8-1 Reset operation

      90
    • 2-8-2 Oscillation Stabilization Wait time

      92
  • 2-9 Register Protection

    94
    • 2-9-1 Overview

      94
    • 2-9-2 Setting of the Register Protection Function

      94
• Chapter 3 Interrupts

  95
  • 3-1 Overview

    96
    • 3-1-1 Functions

      97
    • 3-1-2 Block Diagram

      98
    • 3-1-3 Operation

      99
    • 3-1-4 Interrupt Flag Setup

      108
  • 3-2 Control Registers

    109
    • 3-2-1 Registers List

      109
    • 3-2-2 Interrupt Control Registers

      110
  • 3-3 External Interrupts

    132
    • 3-3-1 Overview

      132
    • 3-3-2 Block Diagram

      133
    • 3-3-3 Control Registers

      136
    • 3-3-4 Programmable Active Edge Interrupt

      141
    • 3-3-5 Both Edges Interrupt

      142
    • 3-3-6 Key Input Interrupt

      143
    • 3-3-7 Noise Filter

      145
    • 3-3-8 AC Zero-Cross Detector

      148
• Chapter 4 I/O Ports

  151
  • 4-1 Overview

    152
    • 4-1-1 I/O Port Diagram

      152
    • 4-1-2 I/O Port Status at Reset

      153
    • 4-1-3 Control Registers

      154
  • 4-2 Port 0

    156
    • 4-2-1 Description

      156
    • 4-2-2 Registers

      157
    • 4-2-3 Block Diagram

      158
  • 4-3 Port 1

    162
    • 4-3-1 Description

      162
    • 4-3-2 Registers

      163
    • 4-3-3 Block Diagram

      166
  • 4-4 Port 2

    167
    • 4-4-1 Description

      167
    • 4-4-2 Registers

      168
    • 4-4-3 Block Diagram

      169
  • 4-5 Port 5

    171
    • 4-5-1 Description

      171
    • 4-5-2 Registers

      172
    • 4-5-3 Block Diagram

      173
  • 4-6 Port 6

    176
    • 4-6-1 Description

      176
    • 4-6-2 Registers

      177
    • 4-6-3 Block Diagram

      179
  • 4-7 Port 7

    180
    • 4-7-1 Description

      180
    • 4-7-2 Registers

      181
    • 4-7-3 Block Diagram

      183
  • 4-8 Port 8

    187
    • 4-8-1 Description

      187
    • 4-8-2 Registers

      188
    • 4-8-3 Block Diagram

      190
  • 4-9 Port A

    191
    • 4-9-1 Description

      191
    • 4-9-2 Registers

      192
    • 4-9-3 Block Diagram

      194
  • 4-10 Real Time Output Control (Port 1)

    195
    • 4-10-1 Registers

      195
    • 4-10-2 Operation

      196
  • 4-11 Synchronous output (Port 6)

    198
    • 4-11-1 Block Diagram

      198
    • 4-11-2 Registers

      199
    • 4-11-3 Operation

      200
    • 4-11-4 Setup Example

      202
• Chapter 5 Prescaler

  203
  • 5-1 Overview

    204
    • 5-1-1 Peripheral Functions

      205
    • 5-1-2 Block Diagram

      206
  • 5-2 Control Register

    207
    • 5-2-1 Registers List

      207
    • 5-2-2 Control Registers

      208
  • 5-3 Operation

    213
    • 5-3-1 Operation

      213
    • 5-3-2 Setup Example

      214
• Chapter 6 8-bit Timers

  215
  • 6-1 Overview

    216
    • 6-1-1 Functions

      216
    • 6-1-2 Block Diagram

      217
  • 6-2 Control Registers

    220
    • 6-2-1 Registers

      220
    • 6-2-2 Programmable Timer Registers

      222
    • 6-2-3 Timer Mode Registers

      224
  • 6-3 8-bit Timer Count

    229
    • 6-3-1 Operation

      229
    • 6-3-2 Setup Example

      231
  • 6-4 8-bit Event Count

    233
    • 6-4-1 Operation

      233
    • 6-4-2 Setup Example

      235
  • 6-5 8-bit Timer Pulse Output

    237
    • 6-5-1 Operation

      237
    • 6-5-2 Setup Example

      238
  • 6-6 8-bit PWM Output

    240
    • 6-6-1 Operation

      240
    • 6-6-2 Setup Example

      242
  • 6-7 8-bit Timer Synchronous Output

    244
    • 6-7-1 Operation

      244
    • 6-7-2 Setup Example

      245
  • 6-8 Serial Interface Transfer Clock Output

    247
    • 6-8-1 Operation

      247
    • 6-8-2 Setup Example

      248
  • 6-9 Simple Pulse Width Measurement

    250
    • 6-9-1 Operation

      250
    • 6-9-2 Setup Example

      251
  • 6-10 Cascade Connection

    253
    • 6-10-1 Operation

      253
    • 6-10-2 Setup Example

      255
  • 6-11 Remote Control Carrier Output

    257
    • 6-11-1 Operation

      257
    • 6-11-2 Setup Example

      258
• Chapter 7 16-bit Timer

  261
  • 7-1 Overview

    262
    • 7-1-1 Functions

      262
    • 7-1-2 Block Diagram

      263
  • 7-2 Control Registers

    264
    • 7-2-1 Registers

      264
    • 7-2-2 Programmable Timer Registers

      265
    • 7-2-3 Timer Mode Registers

      268
  • 7-3 16-bit Timer Count

    270
    • 7-3-1 Operation

      270
    • 7-3-2 Setup Example

      273
  • 7-4 16-bit Event Count

    275
    • 7-4-1 Operation

      275
    • 7-4-2 Setup Example

      277
  • 7-5 16-bit Timer Pulse Output

    279
    • 7-5-1 Operation

      279
    • 7-5-2 Setup Example

      281
  • 7-6 16-bit Standard PWM Output

    283
    • 7-6-1 Operation

      283
    • 7-6-2 Setup Example

      285
  • 7-7 16-bit High Precision PWM Output

    287
    • 7-7-1 Operation

      287
    • 7-7-2 Setup Example

      289
  • 7-8 16-bit Timer Synchronous Output

    291
    • 7-8-1 Operation

      291
    • 7-8-2 Setup Example

      292
  • 7-9 16-bit Timer Capture

    294
    • 7-9-1 Operation

      294
    • 7-9-2 Setup Example

      297
• Chapter 8 Time Base Timer/8-bit Free-running Timer

  299
  • 8-1 Overview

    300
    • 8-1-1 Functions

      300
    • 8-1-2 Block Diagram

      301
  • 8-2 Control Registers

    302
    • 8-2-1 Control Registers

      302
    • 8-2-2 Programmable Timer Registers

      303
    • 8-2-3 Timer Mode Registers

      304
  • 8-3 8-bit Free-running Timer

    305
    • 8-3-1 Operation

      305
    • 8-3-2 Setup Example

      308
  • 8-4 Time Base Timer

    310
    • 8-4-1 Operation

      310
    • 8-4-2 Setup Example

      312
• Chapter 9 Watchdog Timer

  313
  • 9-1 Overview

    314
    • 9-1-1 Block Diagram

      314
  • 9-2 Control Registers

    315
  • 9-3 Operation

    316
    • 9-3-1 Operation

      316
    • 9-3-2 Setup Example

      319
• Chapter 10 Buzzer

  321
  • 10-1 Overview

    322
    • 10-1-1 Block Diagram

      322
  • 10-2 Control Register

    323
  • 10-3 Operation

    324
    • 10-3-1 Operation

      324
    • 10-3-2 Setup Example

      325
• Chapter 11 Serial Interface 0,1

  327
  • 11-1 Overview

    328
    • 11-1-1 Functions

      329
    • 11-1-2 Block Diagram

      330
  • 11-2 Control Registers

    332
    • 11-2-1 Registers

      332
    • 11-2-2 Serial Interface 0 Data Buffer Registers

      333
    • 11-2-3 Serial Interface 0 Mode Registers

      334
    • 11-2-4 Serial Interface 1 Data Buffer Registers

      340
    • 11-2-5 Serial Interface 1 Mode Registers

      341
  • 11-3 Operation

    347
    • 11-3-1 Clock Synchronous Serial Interface

      347
    • 11-3-2 Serial interface 0 Synchronous Serial Interface Pin Setup

      359
    • 11-3-3 Serial interface 1 Synchronous Serial Interface Pin Setup

      362
    • 11-3-4 Setup Example

      365
    • 11-3-5 UART Serial Interface

      368
    • 11-3-6 Serial interface 0 UART Serial Interface Pin Setup

      380
    • 11-3-7 Serial interface 1 UART Serial Interface Pin Setup

      382
    • 11-3-8 Setup Example

      384
• Chapter 12 Serial Interface 3

  387
  • 12-1 Overview

    388
    • 12-1-1 Functions

      388
    • 12-1-2 Block Diagram

      389
  • 12-2 Control Registers

    390
    • 12-2-1 Registers

      390
    • 12-2-2 Data Register

      391
    • 12-2-3 Mode Registers

      392
  • 12-3 Operation

    396
    • 12-3-1 Clock Synchronous Serial Interface

      396
    • 13-3-2 Setup Example

      410
    • 12-3-3 Single Master IIC Interface

      413
    • 12-3-4 Setup Example

      422
• Chapter 13 Serial Interface 4

  427
  • 13-1 Overview

    428
    • 13-1-1 Functions

      428
    • 13-1-2 Block Diagram

      429
  • 13-2 Control Registers

    430
    • 13-2-1 Registers

      430
    • 13-2-2 Data Register

      431
    • 13-2-3 Mode Registers

      432
  • 13-3 Operation

    435
    • 13-3-1 Setup Example of the Slave IIC Serial Interface

      437
• Chapter 14 Automatic Transfer Controller

  439
  • 14-1 Overview

    440
    • 14-1-1 ATC1

      440
    • 14-1-2 Functions

      441
    • 14-1-3 Block Diagram

      442
  • 14-2 Control Registers

    443
    • 14-2-1 Registers

      443
  • 14-3 Operation

    447
    • 14-3-1 Basic Operations and Timing

      447
    • 14-3-2 Setting the Memory Address

      449
    • 14-3-3 Setting the Data Transfer Count

      450
    • 14-3-4 Setting the Data Transfer Modes

      451
    • 14-3-5 Transfer Mode 0

      452
    • 14-3-6 Transfer Mode 1

      453
    • 14-3-7 Transfer Mode 2

      454
    • 14-3-8 Transfer Mode 3

      455
    • 14-3-9 Transfer Mode 4

      456
    • 14-3-10 Transfer Mode 5

      457
    • 14-3-11 Transfer Mode 6

      458
    • 14-3-12 Transfer Mode 7

      460
    • 14-3-13 Transfer Mode 8

      462
    • 14-3-14 Transfer Mode 9

      464
    • 14-3-15 Transfer mode A

      466
    • 14-3-16 Transfer Mode B

      467
    • 14-3-17 Transfer Mode C

      468
    • 14-3-18 Transfer Mode D

      469
    • 14-3-19 Transfer Mode E

      470
    • 14-3-20 Transfer Mode F

      471
  • 14-4 Setup Example

    472
• Chapter 15 A/D Converter

  475
  • 15-1 Overview

    476
    • 15-1-1 Functions

      476
    • 15-1-2 Block Diagram

      477
  • 15-2 Control Registers

    478
    • 15-2-1 Registers

      478
    • 15-2-2 Control Registers

      479
    • 15-2-3 Data Buffers

      481
  • 15-3 Operation

    482
    • 15-3-1 Setup

      484
    • 15-3-2 Setup Example

      486
    • 15-3-3 Cautions

      490
• Chapter 16 D/A Converter

  493
  • 16-1 Overview

    494
    • 16-1-1 Functions

      494
  • 16-2 Operation

    495
  • 16-3 Control Registers

    496
    • 16-3-1 Overview

      496
    • 16-3-2 Control Register (DACTR)

      497
    • 16-3-3 Input Data Registers

      498
  • 16-4 Setup Example

    499
• Chapter 17 Appendices

  501
  • 17-1 Probe Switches

    502
    • 17-1-1 PRB-MBB101C77-M

      502
    • 17-1-2 PX-CN101-M

      503
    • 17-1-3 PRB-ADP101-64-M

      504
    • 17-1-4 PRB-DMY101C77-M

      505
  • 17-2 Special Function Registers List

    506
  • 17-3 Instruction Set

    516
  • 17-4 Instruction Map

    522
• Chapter 18 Flash EEPROM

  525
  • 18-1 Overview

    526
    • 18-1-1 Overview

      526
    • 18-1-2 Differences between Mask ROM version and EPROM

      528
  • 18-2 Pin Descriptions

    529
  • 18-3 Electrical Characteristics

    530
    • 18-3-1 Absolute Maximum Ratings

      530
    • 18-3-2 Operating Conditions

      531
    • 18-3-3 DC Characteristics

      532
  • 18-4 Reprogramming Flow

    533
  • 18-5 PROM writer mode

    534
  • 18-6 Onboard Serial Programming Mode

    536
    • 18-6-1 Overview

      536
    • 18-6-2 Circuit Requirements for the Target Board

      537
    • 18-6-3 Circuit Requirements for the Target Board (in Clock Synchronous Communication using the PanaX Serial Writer)

      540
• Colophon

  543
• Sales offices

  544