Manual Do Utilizadoríndice analíticoChapter 1 USB251x Hub Family Differences Overview7Table 1.1 36-pin QFN (6x6x0.5 mm) RoHS Compliant Part Numbers7Table 1.2 48-pin QFN (7x7x0.5 mm) RoHS Compliant Part Numbers7Table 1.3 64-pin QFN (9x9x0.5 mm) RoHS Compliant Part Numbers7Chapter 2 General Description8Chapter 3 Acronyms10Chapter 4 Block Diagram11Figure 4.1 USB251x Hub Family Block Diagram11Chapter 5 Pin Descriptions125.1 Pin Configurations and Lists (Organized by Package Type)12Figure 5.1 2-Port 36-Pin QFN12Figure 5.2 3-Port 36-pin QFN13Figure 5.3 4-Port 36-pin QFN14Figure 5.4 3-Port 48-Pin QFN15Figure 5.5 4-Port 48-Pin QFN16Figure 5.6 7-Port 64-Pin QFN17Table 5.1 Pin List in Alphabetical Order185.2 USB251x Pin Descriptions (Grouped by Function)22Table 5.2 USB251x Pin Descriptions225.3 Buffer Type Descriptions27Table 5.3 Buffer Type Descriptions27Chapter 6 LED Usage Description296.1 LED Functionality296.1.1 USB Mode 14-Wire296.1.2 LED Mode Speed Indication29Figure 6.1 Dual Color LED Implementation Example29Chapter 7 Battery Charging Support317.1 General Description31Figure 7.1 Battery Charging via External Power Supply317.2 USB Battery Charging317.2.1 Special Behavior of PRTPWR Pins317.3 Battery Charging Configuration327.3.1 Battery Charging enabled via EEPROM or SMBus32Chapter 8 Configuration Options338.1 Hub338.1.1 Hub Configuration Options338.1.2 SMBus or EEPROM Interface33Table 8.1 Hub Configuration Options338.1.3 VBus Detect348.2 EEPROM Interface348.2.1 Internal Register Set (Common to EEPROM and SMBus)35Table 8.2 Internal Default, EEPROM and SMBus Register Memory Map35Table 8.3 PortMap Register for Ports 1 & 248Table 8.4 PortMap Register for Ports 3 & 449Table 8.5 PortMap Register for Ports 5 & 650Table 8.6 PortMap Register for Port 7518.2.2 I2C EEPROM528.2.3 In-Circuit EEPROM Programming528.3 SMBus Slave Interface538.3.1 SMBus Slave Addresses538.3.2 Bus Protocols53Figure 8.1 Block Write53Figure 8.2 Block Read548.3.3 Invalid Protocol Response Behavior548.3.4 General Call Address Response548.3.5 Slave Device Time-Out548.3.6 Stretching the SCLK Signal548.3.7 SMBus Timing548.3.8 Bus Reset Sequence548.3.9 SMBus Alert Response Address558.4 Default Configuration Option:558.5 Default Strapping Options:558.6 Reset558.6.1 External Hardware RESET_N55Figure 8.3 Reset_N Timing for Default/Strap Option Mode56Table 8.7 Reset_N Timing for Default/Strap Option Mode56Figure 8.4 Reset_N Timing for EEPROM Mode57Table 8.8 Reset_N Timing for EEPROM Mode57Figure 8.5 Reset_N Timing for SMBus Mode58Table 8.9 Reset_N Timing for SMBus Mode588.6.2 USB Bus Reset58Chapter 9 DC Parameters609.1 Maximum Guaranteed Ratings609.2 Operating Conditions60Figure 9.1 Supply Rise Time Model61Table 9.1 DC Electrical Characteristics61Table 9.2 Pin Capacitance65Chapter 10 AC Specifications6610.1 Oscillator/Clock66Figure 10.1 Typical Crystal Circuit66Figure 10.2 Formula to Find the Value of C1 and C266Figure 10.3 Simplified Form of the Capacitance Formula6610.1.1 SMBus Interface:6610.1.2 I2C EEPROM:6610.1.3 USB 2.066Chapter 11 Package Outlines67Figure 11.1 36-Pin QFN, 6x6 mm Body, 0.5 mm Pitch67Figure 11.2 48-Pin QFN, 7x7 mm Body, 0.5 mm Pitch68Figure 11.3 64-Pin QFN, 9x9 mm Body, 0.5 mm Pitch6911.1 Tape and Reel Specifications70Figure 11.4 36-Pin Package Tape Specifications70Figure 11.5 48-Pin Package Tape Specifications71Figure 11.6 36-Pin and 48-Pin Package Reel Specifications72Tamanho: 2 MBPáginas: 72Language: EnglishAbrir o manual
Manual Do Utilizadoríndice analíticoChapter 1 USB251x Hub Family Differences Overview7Table 1.1 36-pin QFN (6x6x0.5 mm) RoHS Compliant Part Numbers7Table 1.2 48-pin QFN (7x7x0.5 mm) RoHS Compliant Part Numbers7Table 1.3 64-pin QFN (9x9x0.5 mm) RoHS Compliant Part Numbers7Chapter 2 General Description8Chapter 3 Acronyms10Chapter 4 Block Diagram11Figure 4.1 USB251x Hub Family Block Diagram11Chapter 5 Pin Descriptions125.1 Pin Configurations and Lists (Organized by Package Type)12Figure 5.1 2-Port 36-Pin QFN12Figure 5.2 3-Port 36-pin QFN13Figure 5.3 4-Port 36-pin QFN14Figure 5.4 3-Port 48-Pin QFN15Figure 5.5 4-Port 48-Pin QFN16Figure 5.6 7-Port 64-Pin QFN17Table 5.1 Pin List in Alphabetical Order185.2 USB251x Pin Descriptions (Grouped by Function)22Table 5.2 USB251x Pin Descriptions225.3 Buffer Type Descriptions27Table 5.3 Buffer Type Descriptions27Chapter 6 LED Usage Description296.1 LED Functionality296.1.1 USB Mode 14-Wire296.1.2 LED Mode Speed Indication29Figure 6.1 Dual Color LED Implementation Example29Chapter 7 Battery Charging Support317.1 General Description31Figure 7.1 Battery Charging via External Power Supply317.2 USB Battery Charging317.2.1 Special Behavior of PRTPWR Pins317.3 Battery Charging Configuration327.3.1 Battery Charging enabled via EEPROM or SMBus32Chapter 8 Configuration Options338.1 Hub338.1.1 Hub Configuration Options338.1.2 SMBus or EEPROM Interface33Table 8.1 Hub Configuration Options338.1.3 VBus Detect348.2 EEPROM Interface348.2.1 Internal Register Set (Common to EEPROM and SMBus)35Table 8.2 Internal Default, EEPROM and SMBus Register Memory Map35Table 8.3 PortMap Register for Ports 1 & 248Table 8.4 PortMap Register for Ports 3 & 449Table 8.5 PortMap Register for Ports 5 & 650Table 8.6 PortMap Register for Port 7518.2.2 I2C EEPROM528.2.3 In-Circuit EEPROM Programming528.3 SMBus Slave Interface538.3.1 SMBus Slave Addresses538.3.2 Bus Protocols53Figure 8.1 Block Write53Figure 8.2 Block Read548.3.3 Invalid Protocol Response Behavior548.3.4 General Call Address Response548.3.5 Slave Device Time-Out548.3.6 Stretching the SCLK Signal548.3.7 SMBus Timing548.3.8 Bus Reset Sequence548.3.9 SMBus Alert Response Address558.4 Default Configuration Option:558.5 Default Strapping Options:558.6 Reset558.6.1 External Hardware RESET_N55Figure 8.3 Reset_N Timing for Default/Strap Option Mode56Table 8.7 Reset_N Timing for Default/Strap Option Mode56Figure 8.4 Reset_N Timing for EEPROM Mode57Table 8.8 Reset_N Timing for EEPROM Mode57Figure 8.5 Reset_N Timing for SMBus Mode58Table 8.9 Reset_N Timing for SMBus Mode588.6.2 USB Bus Reset58Chapter 9 DC Parameters609.1 Maximum Guaranteed Ratings609.2 Operating Conditions60Figure 9.1 Supply Rise Time Model61Table 9.1 DC Electrical Characteristics61Table 9.2 Pin Capacitance65Chapter 10 AC Specifications6610.1 Oscillator/Clock66Figure 10.1 Typical Crystal Circuit66Figure 10.2 Formula to Find the Value of C1 and C266Figure 10.3 Simplified Form of the Capacitance Formula6610.1.1 SMBus Interface:6610.1.2 I2C EEPROM:6610.1.3 USB 2.066Chapter 11 Package Outlines67Figure 11.1 36-Pin QFN, 6x6 mm Body, 0.5 mm Pitch67Figure 11.2 48-Pin QFN, 7x7 mm Body, 0.5 mm Pitch68Figure 11.3 64-Pin QFN, 9x9 mm Body, 0.5 mm Pitch6911.1 Tape and Reel Specifications70Figure 11.4 36-Pin Package Tape Specifications70Figure 11.5 48-Pin Package Tape Specifications71Figure 11.6 36-Pin and 48-Pin Package Reel Specifications72Tamanho: 2 MBPáginas: 72Language: EnglishAbrir o manual
