Справочник Пользователя для Mitsubishi Electronics MELSEC -Q/L
7 APPLICATION INSTRUCTIONS
7.5 Data Processing Instructions
427
7
7-segment decode
SEG(P)
Processing details
• Decodes the data from 0 to F designated by the lower 4 bits of (S) to 7-segment display data, and stores at (D).
*1 Head number of bit device or lowest bit of word device
(S): Data to be decoded or head number of the devices where the data to be decoded is stored (BIN 16 bits)
(D): Head number of the devices where the decoding result will be stored (BIN 16 bits)
(D): Head number of the devices where the decoding result will be stored (BIN 16 bits)
Setting
data
data
Internal device
R, ZR
J\
U\G
Zn
Constant
K, H
K, H
Others
Bit
Word
Bit
Word
(S)
(D)
(S)
Configuration of 7
Segments
Segments
(D)
Display data
Hexadecimal
Bit pattern
B7
B6
B5
B4
B3
B2
B1
0
0000
0
0
1
1
1
1
1
1
1
0001
0
0
0
0
0
1
1
0
2
0010
0
1
0
1
1
0
1
1
3
0011
0
1
0
0
1
1
1
1
4
0100
0
1
1
0
0
1
1
0
5
0101
0
1
1
0
1
1
0
1
6
0110
0
1
1
1
1
1
0
1
7
0111
0
0
1
0
0
1
1
1
8
1000
0
1
1
1
1
1
1
1
9
1001
0
1
1
0
1
1
1
1
A
1010
0
1
1
1
0
1
1
1
B
1011
0
1
1
1
1
1
0
0
C
1100
0
0
1
1
1
0
0
1
D
1101
0
1
0
1
1
1
1
0
E
1110
0
1
1
1
1
0
0
1
F
1111
0
1
1
1
0
0
0
1
Basic
Process
High
performance
Redundant Universal
LCPU
Command
Command
SEGP
SEG
S
S
SEG
SEGP
D
D
B0
B6
B3
B5
B1
B4
B2