Справочник Пользователя для Mitsubishi Electronics MELSEC -Q/L

9 MULTIPLE CPU DEDICATED INSTRUCTIONS

9.1 Writing to the CPU Shared Memory of Host CPU

845

MULTIPLE CPU DEDICATED INSTRUCTIONS

9.1

Writing to the CPU Shared Memory of Host CPU

The S.TO or TO instruction is used to write to the CPU shared memory of the host station in the multiple CPU system.
The following table indicates the usability of the S.TO and TO instructions.

Operation of S.TO instruction

The S.TO instruction can write data to the CPU shared memory of the host CPU module.
The following figure shows the processing performed when the S.TO instruction is executed in CPU No. 1.

CPU module

S.TO
instruction

TO instruction

Basic model QCPU

Q00JCPU

Unusable

Q00CPU, Q01CPU

Usable

High Performance model QCPU

Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU

Usable

Unusable

Process CPU

Q02PHCPU, Q06PHCPU, Q12PHCPU, Q25PHCPU

Usable

Unusable

Redundant CPU

Q12PRHCPU, Q25PRHCPU

Unusable

Universal model QCPU

Q00UJCPU

Unusable

Q00UCPU, Q01UCPU, Q02UCPU, Q03UDCPU, Q03UDVCPU,
Q03UDECPU, Q04UDHCPU, Q04UDVCPU, Q04UDEHCPU,
Q06UDHCPU, Q06UDVCPU, Q06UDEHCPU, Q10UDHCPU,
Q10UDEHCPU, Q13UDHCPU, Q13UDVCPU, Q13UDEHCPU,
Q20UDHCPU, Q20UDEHCPU, Q26UDHCPU, Q26UDVCPU,
Q26UDEHCPU, Q50UDEHCPU, Q100UDEHCPU

Usable

LCPU

L02SCPU, L02SCPU-P, L02CPU, L02CPU-P, L06CPU, L06CPU-P,
L26CPU, L26CPU-P, L26CPU-BT, L26CPU-PBT

Unusable

[

SP.TO H3E0 n2 n3 n4 D ]

Device

memory

CPU

shared

memory

Device

memory

Buffer

memory

CPU

shared

memory

CPU No. 1

CPU No. 2

ntelligent

function module

Data

write

Designation of CPU shared memory in CPU No. 1