Справочник Пользователя для Intel Server Board S5500HCV S5500HCVR
Модели
S5500HCVR
Intel® Server Boards S5520HC and S5500HCV TPS
Functional Architecture
Revision 1.2
Intel order number E39529-009
31
Memory Running Frequency
(Y/N)
DIMM Type
DIMM
Populated
Per Channel
800MHz 1066MHz
1333MHz
Command /
Address Rate
Address Rate
Ranks Per DIMM
SR: Single-Rank
DR: Dual-Rank
QR: Quad-Rank
Description
ECC
memory: 800MHz, 1066MHz, or 1333MHz.
UDIMM
w/ or w/o
ECC
2 Y Y
N
2N
SR, DR or mixing
of SR and DR
All UDIMMs run at 800MHz or 1066MHz
when two UDIMMs (Single- or Dual-Rank)
are installed in the same channel.
when two UDIMMs (Single- or Dual-Rank)
are installed in the same channel.
1N: One clock cycle for the DRAM commands arrive at the DIMMs to execute.
2N: Two clock cycles for the DRAM commands arrive at the DIMMs to execute.
2N: Two clock cycles for the DRAM commands arrive at the DIMMs to execute.