Справочник Пользователя для Intel Server Board S5500HCV S5500HCVR
Модели
S5500HCVR
Intel® Server Boards S5520HC and S5500HCV TPS
Functional Architecture
Revision 1.2
Intel order number E39529-009
43
3.5 PCI
Subsystem
The primary I/O buses for the Intel
®
Server Board S5520HC are PCI, PCI Express* Gen1, and
PCI Express* Gen2 with six independent PCI bus segments.
The primary I/O buses for the Intel
®
Server Board S5500HCV are PCI, PCI Express* Gen1, and
PCI Express* Gen2 with five independent PCI bus segments.
PCI Express* Gen1 and Gen2 are dual-simplex point-to-point serial differential low-voltage
interconnects. A PCI Express* topology can contain a Host Bridge and several endpoints (I/O
devices). The signaling bit rate is 2.5 Gb/s one direction per lane for Gen1 and 5.0 Gb/s one
direction per lane for Gen2. Each port consists of a transmitter and receiver pair. A link between
the ports of two devices is a collection of lanes (x1, x2, x4, x8, x16, and so forth). All lanes
within a port must transmit data using the same frequency. The PCI buses comply with the PCI
Local Bus Specification
interconnects. A PCI Express* topology can contain a Host Bridge and several endpoints (I/O
devices). The signaling bit rate is 2.5 Gb/s one direction per lane for Gen1 and 5.0 Gb/s one
direction per lane for Gen2. Each port consists of a transmitter and receiver pair. A link between
the ports of two devices is a collection of lanes (x1, x2, x4, x8, x16, and so forth). All lanes
within a port must transmit data using the same frequency. The PCI buses comply with the PCI
Local Bus Specification
, Revision 2.3.
The following tables list the characteristics of the PCI bus segments. Details about each bus
segment follow the tables.
segment follow the tables.
Table 8. Intel
®
Server Board S5520HC PCI Bus Segment Characteristics
PCI Bus Segment
Voltage
Width
Speed
Type
PCI I/O Card Slots
PCI32
ICH10R
ICH10R
5 V
32 bit
33 MHz
PCI
PCI Slot 1
PE1, PE2, PE3,
PE4
ICH10R PCI
Express* Ports
PE4
ICH10R PCI
Express* Ports
3.3 V
x4
10 Gb/s
PCI
Express*
Gen1
Express*
Gen1
x4 PCI Express* Gen1 throughput to Slot 2
(x8 mechanically) and Intel
(x8 mechanically) and Intel
®
SAS Entry
RAID Module AXX4SASMOD slot
(Default to Slot 2, and switch to SAS
Module slot when Intel
(Default to Slot 2, and switch to SAS
Module slot when Intel
®
SAS Entry RAID
Module AXX4SASMOD is detected)
This PCI Express* Gen1 slot is not
available when the SAS module slot is in
use and vice versa.
This PCI Express* Gen1 slot is not
available when the SAS module slot is in
use and vice versa.
PE5
ICH10R PCI
Express* Port
ICH10R PCI
Express* Port
3.3 V
x1
2.5 Gb/s
PCI
Express*
Gen1
Express*
Gen1
x1 PCI Express* Gen1 throughput to
onboard Integrated BMC
onboard Integrated BMC
PE1, PE2
5520 IOH PCI
Express* Ports
5520 IOH PCI
Express* Ports
3.3 V
x4
10 Gb/s
PCI
Express*
Gen1
Express*
Gen1
x4 PCI Express* Gen1 throughput to
onboard NIC (82575EB)
onboard NIC (82575EB)
PE3, PE4
5520 IOH PCI
Express* Ports
5520 IOH PCI
Express* Ports
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
Express*
Gen2
x8 PCI Express* Gen2 throughput to Slot 6
(x16 mechanically)
(x16 mechanically)
PE5, PE6
5520 IOH PCI
Express* Ports
5520 IOH PCI
Express* Ports
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
Express*
Gen2
x8 PCI Express* Gen2 throughput to Slot 5
(x8 mechanically)
(x8 mechanically)
PE7, PE8
5520 IOH PCI
Express* Ports
5520 IOH PCI
Express* Ports
3.3 V
x8
40 Gb/S
PCI
Express*
Gen2
Express*
Gen2
x8 PCI Express* Gen2 throughput to Slot 4
(x8 mechanically)
(x8 mechanically)