Справочник Пользователя для Intel E5630 AT80614005463AA
Модели
AT80614005463AA
Electrical Specifications
26
Intel
®
Xeon
®
Processor 5600 Series Datasheet Volume 1
Note:
1.
This setting is defined for future use; no Intel Xeon processor 5600 series SKU is defined with ICC_MAX=40
A.
2.
In general, set PWM IMON slope to 900 mV = IMAX, where IMAX = ICCMAX. For the 130 W SKU, set IMON
slope to 900 mV= 180 A. All other SKUs must match the values shown above. Please consult the PWM
datasheet for the IMON slope setting.
Some POC signals include specific timing requirements. Please refer to
for
further details.
2.1.7.4
Processor V
TT
Voltage Identification (VTT_VID) Signals
The voltage set by the VTT_VID signals is the typical reference voltage regulator (VR)
output to be delivered to the processor V
output to be delivered to the processor V
TTA
and V
TTD
lands. It is expected that one
regulator will supply all V
TTA
and V
TTD
lands. VTT_VID signals are CMOS push/pull
outputs. Please refer to
for the DC specifications for these signals.
Individual processor VTT_VID values may be calibrated during manufacturing such that
two devices at the same core frequency may have different default VTT_VID settings.
two devices at the same core frequency may have different default VTT_VID settings.
The processor utilizes three voltage identification signals to support automatic selection
of power supply voltages. These correspond to VTT_VID[4:2]. The V
of power supply voltages. These correspond to VTT_VID[4:2]. The V
TT
voltage level
delivered to the processor lands must also encompass a 20 mV offset (See
;
V
TT_TYP
) above the voltage level corresponding to the state of the VTT_VID[7:0] signals
(See
; VR 11.0 Voltage).
static and transient tolerances. Please note that the maximum and minimum electrical
loadlines are defined by a 31.5 mV tolerance band above and below V
loadlines are defined by a 31.5 mV tolerance band above and below V
TT_TYP
values.
Power source characteristics must be guaranteed to be stable whenever the supply to
the voltage regulator is stable.
the voltage regulator is stable.
CSC[2:0]
VID[5:3]
-000b
-001b
-010b
-011b
-100b
-101b
-111b
-001b
-010b
-011b
-100b
-101b
-111b
Feature Disabled
ICC_MAX = 40 A
1
40 W TDP / ICC_MAX = 50 A
60 W TDP / ICC_MAX = 80 A
80W TDP / ICC_MAX = 100 A
95W TDP / ICC_MAX = 120 A
95W TDP / ICC_MAX = 120 A
130W TDP / ICC_MAX =
150A
2
Current Sensor Configuration
(CSC) programs the gain
applied to the ISENSE A/D
output. ISENSE data is then
used to dynamically calculate
current and power.
MSID[2:0]
VID[2:0]
-001b
-011b
-100b
-101b
-110b
-011b
-100b
-101b
-110b
40 W TDP / 50 A ICC_MAX
60 W TDP / 80 A ICC_MAX
60 W TDP / 80 A ICC_MAX
80 W TDP / 100 A ICC_MAX
95 W TDP / 120 A ICC_MAX
95 W TDP / 120 A ICC_MAX
130 W TDP / 150 A ICC_MAX
MSID[2:0] signals are provided
to indicate the Market Segment
for the processor and may be
used for future processor
compatibility or keying. See
for platform timing
requirements of the MSID[2:0]
signals.
Table 2-3. Power-On Configuration (POC[7:0]) Decode (Sheet 2 of 2)
Function
Bits
POC Settings
Description
Table 2-4.
V
TT
Voltage Identification Definition (Sheet 1 of 2)
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VR 11.0
Voltage
V
TT_TYP
(Voltage + Offset)
0
1
0
0
0
0
1
0
1.200 V
1.220 V
0
1
0
0
0
1
1
0
1.175 V
1.195 V
0
1
0
0
1
0
1
0
1.150 V
1.170 V
0
1
0
0
1
1
1
0
1.125 V
1.145 V
0
1
0
1
0
0
1
0
1.100 V
1.120 V