Справочник Пользователя для Intel N475 AU80610006240AA
Модели
AU80610006240AA
Electrical Specifications
48
Datasheet
NOTES:
1.
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as
a logical low value.
a logical low value.
3.
VIH is defined as the maximum voltage level at a receiving agent that will be interpreted
as a logical high value.
as a logical high value.
4.
VIH and VOH may experience excursions above
V
CCP.
. However, input signal drivers must
comply with the signal quality specifications.
5.
This is the pull-down driver resistance. Measured at 0.31 *
V
CCP
.
R
ON
(min) = 0.4 *
R
TT
,
R
ON
(typ) = 0.455 *
R
TT
,
R
ON
(max) = 0.51 *
R
TT
.
R
TT
typical value of 55 Ohm is used for
R
ON
typ/min/max calculations.
6.
GTLREF is the on-die termination resistance measured at VOL of the output driver.
Measured at 0.31 *
Measured at 0.31 *
V
CCP
. The
V
CCP
. referred to in these specifications is the instantaneous
V
CCP
.
7.
R
TT
is the on-die termination resistance measured at VOL of the output driver. Measured at
0.31 *
V
CCP
.
R
TT
is connected to
V
CCP
on die.
8.
Specified with on-die
R
ON
and
R
TT
are turned off. Vin between 0 and
V
CCP.
9.
C
PAD
includes die capacitance only. No package parasitic are included.
10.
On die termination resistance, measured at 0.33 *
V
CCP
.
NOTES:
1.
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The
V
CCP
referred to in these specifications is the instantaneous
V
CCP
.
3.
Refer to the processor I/O Buffer Models for I/V characteristics.
4.
Measured at Iout = -1.1 mA.
5.
Measured at Iout = 1.1 mA.
6.
For
V
IN
between 0V and V
CCP
. Measured when driver is tri-stated.
7.
C
PAD1
includes die capacitance only for CPUPWRGOOD. No package parasitic are included.
8.
C
PAD2
includes die capacitance for all other CMOS input signals. No package parasitics are
included.
I
LI
Input
Leakage
Current
Leakage
Current
-100
100
μA
8
C
PAD
Pad
Capacitance
Capacitance
2.35
2.5
2.6
pF
9
Table 4-25.GTL Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
Table 4-26.Legacy CMOS Signal Group DC Specification
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
CCP
I/O Voltage
1.00
1.05
1.10
V
V
IH
Input High Voltage
0.7 * V
CCP
V
CCP
+ 0.1
V
2
V
IL
Input Low Voltage
-0.1
0
0.3 * V
CCP
V
2, 3
V
OH
Output High Voltage
0.9 * V
CCP
V
CCP
V
CCP
+ 0.1
V
2, 4
V
OL
Output Low Voltage
-0.1
0.1 * V
CCP
V
2, 5
I
LI
Input Leakage Current
-100
100
uA
6
C
PAD1
Pad Capacitance
2.35
2.5
2.6
pF
7
C
PAD2
Pad Capacitance for
CMOS Input
CMOS Input
0.85
1.0
1.05
pF
8