Справочник Пользователя для Mitsubishi Electronics QCPU
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.4 Indirect Specification
3.4
Indirect Specification
(1) Indirect Specification
(a) Indirect specification is a method that specifies address of the device to be used in a
sequence program using two word devices (two points of word device). Use indirect
specification as index modification when the index register is insufficient.
specification as index modification when the index register is insufficient.
(b) Specify the device to be used for specifying the address as "@ + (word device
number)". For example, when @D100 is specified, the device address will be the
contents of D101 and D100.
contents of D101 and D100.
(c) The address of the device specified indirectly can be confirmed with the ADRSET
instruction.
For the ADRSET instruction, refer to Section 7.18.6.
For the ADRSET instruction, refer to Section 7.18.6.
(2) Indirect specification available devices
Table 3.3 shows that the CPU module devices can be specified indirectly.
Table 3.3 List of Indirect Specification Available Devices
*1: For the device names, refer to the QnUCPU User’s Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User’s Manuall
(Function Explanation, Program Fundamentals)
(Function Explanation, Program Fundamentals)
*2: Indicates when index modification by an index register is performed.
*3: Indirect specification is possible, but the address can not be written with the ADRSET instruction.
*3: Indirect specification is possible, but the address can not be written with the ADRSET instruction.
Device Type
Availability of
Indirect
Specification
Example of Indirect Specification
Internal user device
Bit device *1
N/A
––––––––––
Word device *1
Available
• @D100
• @D100Z2 *2
• @D100Z2 *2
Link direct device
Bit device *1
N/A
––––––––––
Word device *1
Available
*3
• @J1\W10
• @J1Z1\W10Z2 *2
• @J1Z1\W10Z2 *2
Intelligent function module device
Available
*3
• @U10\G0
• @U10Z1\G0Z2 *2
• @U10Z1\G0Z2 *2
Index register
N/A
––––––––––
File register
Available
• @R0, @ZR20000
• @R0Z1,@ZR20000Z1 *2
• @R0Z1,@ZR20000Z1 *2
Extended data register (D)
Available
• @D1000
• @W1000
• @W1000
Extended link register (W)
Nesting
Nesting
N/A
––––––––––
Pointer
––––––––––
Constants
––––––––––
Other
SFC block device
––––––––––
SFC transition device
Network No. specification
device
I/O No. specification device
Network No. specification
device
I/O No. specification device
D100Z0
D110
K10000 D150
K50
DMO
V
DMO
V
MO
V
Z0
W0
D10
K10000 D150
K50
D0
D
+
DMO
V
@D10
D110
MO
V
DMO
V
W0
D100
ADRS
ET
D0
S
tores the address of
D100
to D0.
(Address of D100) + 50 =
(Address of D150)
S
pecification of
D
(100 + 50) = D150
[When index resister is used]
[When indirect specification is used]
S
pecification of
address of D150