Справочник Пользователя для Mitsubishi Electronics QCPU
2-28
2.4.8
Other convenient instructions
Table 2.17 Other convenient instructions
Category
Instruction Symbol
Symbol
Processing Details
Execution
Condition
Number
of Basi
c S
tep
s
Subset
See for D
esc
ripti
on
Up/Down
counter
counter
UDCNT1
4
-
UDCNT2
4
-
Teaching
timer
timer
TTMR
3
-
Special
timer
timer
STMR
• The 4 points from the bit device
designated by (D) operate as shown
below, depending on the ON/OFF
status of the input conditions for the
STMR instruction:
(D)+0: Off delay timer output
below, depending on the ON/OFF
status of the input conditions for the
STMR instruction:
(D)+0: Off delay timer output
(D)+1: One shot after off timer output
(D)+2: One shot after on timer output
(D)+3: On delay and off delay timer
output
3
-
Shortest
direction
control
direction
control
ROTC
• Rotates a rotary table with n1 divisions
from the stop position to the position
designated by (S+1) in the shortest
direction.
designated by (S+1) in the shortest
direction.
5
-
Ramp
signal
signal
RAMP
• Changes device data designated by D1
from n1 to n2 in n3 scans.
6
-
Pulse
density
density
SPD
• Counts the pulse input from the device
designated by (S) for the duration of
time designated by n, and stores the
count in the device designated by (D).
time designated by n, and stores the
count in the device designated by (D).
4
-
Pulse
output
output
PLSY
4
-
Pulse
width
modulation
width
modulation
PWM
4
-
Matrix
input
input
MTR
• Reads data of 16 points n rows from
the devices starting from the one
specified by (S), and stores them to the
devices starting from the one specified
by (D2).
specified by (S), and stores them to the
devices starting from the one specified
by (D2).
5
-
UDCNT1
n
S D
(S)+1
Up
Down
Up
(S)+0
Present Cn value
Cn contact
1 2 3 4
6 7 6 5
3 2 1 0 -1 -2 -3 -2 -1 0
0
4
5
UDCNT2
n
S D
(S)+0
(S)+1
Present Cn value
Cn contact
1
2
4
5
4
3
1
0
-1
0
3
2
TTMR
n
D
(Time that TTMR is ON) n
(D)
n=0:1, n=1:10n, n=2:100
STMR
n
S
D
ROTC
n2
n1
S
D
RAMP
D1 n3
n1 n2
D2
SPD
n
S
D
PLSY
n1 n2 D
(n1)Hz
(D)
Output n2 times
PWM
n1 n2 D
n1
n2
(D)
MTR
D2 n
D1
S