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SieMo S50037 Data Book
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figure 20 USB Power Modes- Applications
USB Timing
figure 21 USB Disconnect and Resume Signal Timing
Serial Peripheral Interface
Overview
Consistent with the Motorola SPI standard
SieMo always acts in slave mode
SPI_CLK is always generated by the host
SieMo uses 16-bit addresses and 16-bit data during serial peripheral interface transactions.
Such transactions will operate regardless of whether the internal processor is running or is
stopped. This section details the considerations required when interfacing to SieMo via the
four dedicated Serial peripheral interface terminals.
Such transactions will operate regardless of whether the internal processor is running or is
stopped. This section details the considerations required when interfacing to SieMo via the
four dedicated Serial peripheral interface terminals.
Instruction Cycle
Before SieMo can be addressed, SPI_CSB must be taken low (SPI_CSB = 0). Data on
SPI_MOSI is then clocked into the SieMo on the rising edge of the clock-line SPI_CLK.
When reading, SieMo will reply to the master on MISO, the data being valid on the falling
edge of the SPI_CLK. The master provides the clocking.
SPI_MOSI is then clocked into the SieMo on the rising edge of the clock-line SPI_CLK.
When reading, SieMo will reply to the master on MISO, the data being valid on the falling
edge of the SPI_CLK. The master provides the clocking.
Single-Cycle Operation
After a serial peripheral interface transaction finishes, the master toggles SPI_CLK with
SPI_CSB high to initiate a new transaction. SPI_CSB must be high for at least two SPI_CLK
cycles.
SPI_CSB high to initiate a new transaction. SPI_CSB must be high for at least two SPI_CLK
cycles.