Справочник Пользователя для IBM 750GX
User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
gx_02.fm.(1.2)
March 27, 2006
March 27, 2006
Programming Model
Page 93 of 377
Although there is no Subtract Immediate instruction, its effect can be achieved by using an addi instruction
with the immediate operand negated. Simplified mnemonics are provided that include this negation. The subf
instructions subtract the second operand (rA) from the third operand (rB). Simplified mnemonics are provided
in which the third operand is subtracted from the second operand. See Appendix F, “Simplified Mnemonics,”
in the PowerPC Microprocessor Family: The Programming Environments Manual for examples.
with the immediate operand negated. Simplified mnemonics are provided that include this negation. The subf
instructions subtract the second operand (rA) from the third operand (rB). Simplified mnemonics are provided
in which the third operand is subtracted from the second operand. See Appendix F, “Simplified Mnemonics,”
in the PowerPC Microprocessor Family: The Programming Environments Manual for examples.
The UISA states that an implementation that executes instructions that set the overflow enable bit (OE) or the
carry bit (CA) can either execute these instructions slowly or prevent execution of the subsequent instruction
until the operation completes. Chapter 6, Instruction Timing, on page 209 describes how the 750GX handles
CR dependencies. The summary overflow bit (SO) and overflow bit (OV) in the Integer Exception Register
are set to reflect an overflow condition of a 32-bit result. This can happen only when OE = 1.
carry bit (CA) can either execute these instructions slowly or prevent execution of the subsequent instruction
until the operation completes. Chapter 6, Instruction Timing, on page 209 describes how the 750GX handles
CR dependencies. The summary overflow bit (SO) and overflow bit (OV) in the Integer Exception Register
are set to reflect an overflow condition of a 32-bit result. This can happen only when OE = 1.
Integer Compare Instructions
The integer compare instructions algebraically or logically compare the contents of register rA with either the
zero-extended value of the unsigned immediate value (UIMM) operand, the sign-extended value of the
signed immediate value (SIMM) operand, or the contents of register rB. The comparison is signed for the
cmpi and cmp instructions, and unsigned for the cmpli and cmpl instructions. Table 2-8 summarizes the
integer compare instructions. For more information, see the PowerPC Microprocessor Family: The Program-
ming Environments Manual.
zero-extended value of the unsigned immediate value (UIMM) operand, the sign-extended value of the
signed immediate value (SIMM) operand, or the contents of register rB. The comparison is signed for the
cmpi and cmp instructions, and unsigned for the cmpli and cmpl instructions. Table 2-8 summarizes the
integer compare instructions. For more information, see the PowerPC Microprocessor Family: The Program-
ming Environments Manual.
The crfD operand can be omitted if the result of the comparison is to be placed in CR0. Otherwise, the target
CR field must be specified in crfD, using an explicit field number.
CR field must be specified in crfD, using an explicit field number.
For information on simplified mnemonics for the integer compare instructions see Appendix F, “Simplified
Mnemonics,” in the PowerPC Microprocessor Family: The Programming Environments Manual.
Mnemonics,” in the PowerPC Microprocessor Family: The Programming Environments Manual.
Add to Zero Extended
addze (addze. addzeo addzeo.)
rD,rA
Subtract from Zero Extended
subfze (subfze. subfzeo subfzeo.)
rD,rA
Negate
neg (neg. nego nego.)
rD,rA
Multiply Low Immediate
mulli
rD,rA,SIMM
Multiply Low
mullw (mullw. mullwo mullwo.)
rD,rA,rB
Multiply High Word
mulhw (mulhw.)
rD,rA,rB
Multiply High Word Unsigned
mulhwu (mulhwu.)
rD,rA,rB
Divide Word
divw (divw. divwo divwo.)
rD,rA,rB
Divide Word Unsigned
divwu divwu. divwuo divwuo.
rD,rA,rB
Table 2-8. Integer Compare Instructions
Name
Mnemonic
Syntax
Compare Immediate
cmpi
crfD,L,rA,SIMM
Compare
cmp
crfD,L,rA,rB
Compare Logical Immediate
cmpli
crfD,L,rA,UIMM
Compare Logical
cmpl
crfD,L,rA,rB
Table 2-7. Integer Arithmetic Instructions
(Page 2 of 2)
Name Mnemonic
Syntax