Справочник Пользователя для Motorola PrPMC800/800ET Processor PMC Module
3 Functional Description
PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)
17
Harrier Power-Up Configuration
The Harrier ASIC XAD30-XAD0 pins provide configuration information for Harrier at power-up
reset time. The following table lists the default power-up reset state of these pins for the
PrPMC800/800ET module. The Select Option column indicates whether the power-up setting
can be changed by jumper, or if the setting is fixed and cannot be changed. The Default Power-
Up Setting column indicates the default values for the standard PrPMC800/800ET product.
Default settings for jumper options indicate power-up values with jumpers not installed.
reset time. The following table lists the default power-up reset state of these pins for the
PrPMC800/800ET module. The Select Option column indicates whether the power-up setting
can be changed by jumper, or if the setting is fixed and cannot be changed. The Default Power-
Up Setting column indicates the default values for the standard PrPMC800/800ET product.
Default settings for jumper options indicate power-up values with jumpers not installed.
Table 3-2. Harrier Power-Up Configuration Settings
Harrier
XAD
Bus
Signal
XAD
Bus
Signal
Select
Option
Option
Default
Power-
Up
Setting
Power-
Up
Setting
Function/
Register Bit
Register Bit
Description
XAD[30]
Jumper J2
pins 15-16
pins 15-16
1
Hawk data mode
XCSR.XPGC.HDM
XCSR.XPGC.HDM
Enable/Disable (1/0) Hawk
16-bit data ordering mode for
Xports configured for Hawk
addressing mode. Xport 1
(flash bank B) is configured
for Hawk compatibility mode.
If disabled, use Harrier byte
ordering mode.
16-bit data ordering mode for
Xports configured for Hawk
addressing mode. Xport 1
(flash bank B) is configured
for Hawk compatibility mode.
If disabled, use Harrier byte
ordering mode.
XAD[29]
Fixed
0
UART clock select
Select external clock source
for UART.
for UART.
XAD[28]
Jumper J2
pins 9-10
pins 9-10
0
PCI slave
configuration holdoff
XCSR.BPCS.CSH
configuration holdoff
XCSR.BPCS.CSH
Enable/disable (1/0)
configuration space hold off. If
enabled, accesses to the PCI
configuration space from
another PCI master results in
a disconnect retry. Local
PrPMC800/800ET software
must clear this register bit to
enable access after inbound
address and attribute fields
have been set.
configuration space hold off. If
enabled, accesses to the PCI
configuration space from
another PCI master results in
a disconnect retry. Local
PrPMC800/800ET software
must clear this register bit to
enable access after inbound
address and attribute fields
have been set.
XAD[27]
Fixed
0
PCI slave
configuration mask
XCSR.BPCS.CSM
configuration mask
XCSR.BPCS.CSM
All of Harrier’s PCI
configuration registers are
visible from PCI space.
configuration registers are
visible from PCI space.
XAD[26]
Jumper J2
pins11-12
pins11-12
0
Processor holdoff
XCSR.BXCS
XCSR.BXCS
Enable/disable (1/0)
processor hold off at power-
up. If enabled, processor is
held in reset.
processor hold off at power-
up. If enabled, processor is
held in reset.
XAD[25]
Fixed
0
SDRAM external
register
XCSR.SDTC.SDER
register
XCSR.SDTC.SDER
There are no external buffers
in series with the BAx, RAx,
WE, RAS or CAS signals.
in series with the BAx, RAx,
WE, RAS or CAS signals.
XAD[24]
Fixed
1
Response to
unmapped address-
only cycles
XCSR.GCSR.AOAO
unmapped address-
only cycles
XCSR.GCSR.AOAO
Harrier responds to
unmapped address only
cycles.
unmapped address only
cycles.