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CONTENTS

GUIDE TO THIS MANUAL

MANUAL CONTENTS ................................................................................................... 1-1

RELATED DOCUMENTS .............................................................................................. 1-2

ARCHITECTURAL OVERVIEW

MICROCONTROLLER FEATURES .............................................................................. 2-1

BLOCK DIAGRAM ......................................................................................................... 2-2

INTERNAL TIMING........................................................................................................ 2-2

EXTERNAL TIMING ...................................................................................................... 2-5

INTERNAL PERIPHERALS ........................................................................................... 2-6

I/O Ports ....................................................................................................................2-7

Synchronous Serial I/O Port .....................................................................................2-7

Event Processor Array ..............................................................................................2-7

J1850 Communications Controller ............................................................................2-7

DESIGN CONSIDERATIONS........................................................................................ 2-7

ADDRESS SPACE

ADDRESS PARTITIONS ............................................................................................... 3-1

REGISTER FILE ............................................................................................................ 3-2

PERIPHERAL SPECIAL-FUNCTION REGISTERS ...................................................... 3-4

WINDOWING................................................................................................................. 3-6

STANDARD AND PTS INTERRUPTS

INTERRUPT SOURCES, VECTORS, AND PRIORITIES ............................................. 4-1

INTERRUPT REGISTERS............................................................................................. 4-2

Interrupt Mask Registers ...........................................................................................4-3

Interrupt Pending Registers ......................................................................................4-4

Peripheral Transaction Server Registers ..................................................................4-6

I/O PORTS OVERVIEW ................................................................................................ 5-1

INTERNAL STRUCTURE FOR PORTS 1, 2, 5, AND 6 (BIDIRECTIONAL PORTS) .... 5-1

Configuring Ports 1, 2, 5, and 6 (Bidirectional Ports) ................................................5-3

Special Bidirectional Port Considerations .................................................................5-4

INTERNAL STRUCTURE FOR PORTS 3 AND 4 (ADDRESS/DATA BUS).................. 5-5