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CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
60
Notes:
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When software reset is triggered (SCR:UPCL="1"), this bit will be reset to "0".
⋅
For read-modify-write instructions, "1" will be read.
⋅
When the synchronous transmission enable bit (TSYNE) is set to "1", this bit will not be set to "1".
[bit7] TINTE: Timer interrupt enable bit
This bit is used to enable/disable timer interrupts to the CPU.
When this bit is set to "1" and the timer interrupt flag (TINT) is set to "1", a status interrupt request will be
output.
TINTE
Description
0
Interrupts by the serial timer disabled
1
Interrupts by the serial timer enabled
[bit6] TSYNE: Synchronous transmission enable bit
This bit is used to enable or disable synchronous transmission.
When this bit is set to "1", transmission will be activated if the serial timer register (STMR) matches the
serial timer compare register (STMCR).
TSYNE
Description
0
Synchronous transmission disabled
The serial timer will be used as a timer.
1
Synchronous transmission enabled
The serial timer will not be used as a timer.
Notes:
⋅
This bit can be changed only when the serial timer enable bit (TMRE) is set to "0".
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When synchronous transmission is enabled (TSYNE="1") and transmission is disabled (SCR:TXE="0"),
transmission will not be activated, even if the serial timer register (STMR) matches the serial timer
compare register (STMCR).
⋅
In the slave mode (SCR:MS="1"), this bit will be internally fixed to "0".
[bit5] TRGE: External trigger enable bit
This bit is used to select how to activate the serial timer.
TRGE
Description
0
When the serial timer enable bit (TMRE) is changed from
"0" to "1", the serial timer will start operation.
1
When the serial timer enable bit (TMRE) is set to "1", and
an edge of the external trigger set by the trigger select bits
(TRG1, 0) is detected, the serial timer will start operation.
Notes:
⋅
This bit can be changed only when the serial timer enable bit (TMRE) is set to "0".
⋅
When the serial timer enable bit (TMRE) is set to "0", the serial timer will not start operation, even if an
edge of the external trigger set by the trigger select bits (TRG1, 0) is detected.
MB91520 Series
MN705-00010-1v0-E
1373