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CHAPTER 45: FLASH MEMORY
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : FLASH MEMORY
FUJITSU SEMICONDUCTOR CONFIDENTIAL
51
5.10. Notes on Using Flash Memory
Notes on using flash memory are shown below.
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If this device is reset during a write, the data that was written cannot be guaranteed.
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If CPU programming mode is set (FWE=1) using the FWE bit of the FLASH control register (FCTLR),
do not execute the program in flash memory. The program runs out of control without fetching the
correct values.
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If CPU programming mode is set (FWE=1) using the FWE bit of the FLASH control register (FCTLR)
and the interrupt vector table is in flash memory, do not generate interrupt requests. The program runs
out of control without fetching the correct values.
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Because this model has the ECC bit added, data always needs to be written as 32 bits by two 16-bit
writes. See "5.2. Programming Flash Memory by CPU" for the procedure.
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Do not issue commands to multiple macros simultaneously (i.e. in parallel). Input a command to the next
macro after confirming that the command has completed using either the hardware sequence flag or
FRDY bit.
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Once authentication is complete using the debugger (OCD) password, OCD can be used to read the
content of flash memory externally even if security is on. If you want to prevent a third party from
reading, always set a password for enabling on chip debugger (OCD) startup.
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Changing to the standby state is a prohibition during FLASH program/erase.
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Because of build-in ECC in this flash memory, the data superscription to the address where some values
have already been written cannot be done.
MB91520 Series
MN705-00010-1v0-E
1972