Справочник Пользователя для Fujitsu FR81S
CHAPTER 47: ON CHIP DEBUGER (OCD)
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: ON CHIP DEBUGGER : OCD
FUJITSU SEMICONDUCTOR CONFIDENTIAL
15
4.2.2. High-Speed Communication Frequency Register :
HSCFR
The high-speed communication frequency register is shown below.
It is a register that sets frequency information on PLL clock used.
For details, contact their representatives.
HSCFR: Address 0BF0
H
(Access: Byte, Half-word, Word)
Bit31
Bit30
Bit29
Bit28
Bit27
Bit26
Bit25
Bit24
Reserved
Initial value
X
X
X
X
X
X
X
X
Attribute RX,W0
RX,W0
RX,W0
RX,W0
RX,W0
RX,W0
RX,W0
RX,W0
Bit23
Bit22
Bit21
Bit20
Bit19
Bit18
Bit17
Bit16
Reserved
FREQ[17:16]
Initial value
X
X
X
X
X
X
0
0
Attribute RX,W0
RX,W0
RX,W0
RX,W0
RX,W0
RX,W0
R/W
R/W
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
FREQ[15:8]
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
FREQ[7:0]
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R/W
R/W
RW
R/W
R/W
R/W
R/W
MB91520 Series
MN705-00010-1v0-E
2026