Справочник Пользователя для Fujitsu FR81S
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
41
Figure 5-1 Wiring Diagram of Each I/O Mode (1)
TIOBn
TIOAn
TIOBm
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
ECK
TGIN
TIN
TOUT
TIOBn
TIOAn
TIOBm
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
TIOBn
TIOAn
TIOBm
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
ECK
TGIN
TIN
TOUT
COU T
TIOBn
TIOAn
TIOBm
TIOAm
ch.n
ch.m
ECK
TGIN
TIN
TOUT
DTRG
ECK
TGIN
TIN
TOUT
COU T
Block diagram for I/O mode 0 (16-bit timer standard mode)
Base timer
Base timer
Base timer
Base timer
Base timer
Base timer
Base timer
Base timer
Block diagram for I/O mode 1 (32-bit timer full mode)
Block diagram for I/O mode 2 (External trigger sharing mode)
Block diagram for I/O mode 4 (Timer activation/stop mode)
m
:c
h.
0
n:
ch.
1
MB91520 Series
MN705-00010-1v0-E
674