Справочник Пользователя для AMD LX 900@1.5W

33234H

Bits [3:0] specify a compare value that allows the CPU to compare pixels in planar modes. Read mode 1 performs a com-
parison based on these bits combined with the Color Don’t Care bits. Data returned will contain a 1 in each one of the eight
pixel positions where a color match is found. See the description of read modes (Section 6.5.5.4 on page 291) for more
information. 

Index

02h

Type

R/W

Reset Value

xxh

7:4

RSVD

3

CO_CM_MP3

2

CO_CM_MP2

1

CO_CM_MP1

0

CO_CM_MP0

Index

03h

Type

R/W

Reset Value

xxh

7:5

RSVD

4:3

WROP

Write Operation. Data written to the frame buffer by the CPU can be logically combined 
with data already in the CPU data latches.

00: Copy (CPU data written unmodified).
01: CPU data ANDed with latched data.
10: CPU data ORed with latched data.
11: CPU data XORed with latched data.

See the description of write modes (Section 6.5.5.3 on page 290) for more information.

2:0

ROTCNT

Rotate Count. This value is used to rotate the CPU data before it is used in write modes 
0 and 3. The CPU data byte written is rotated right, with low bits wrapping to the high bit 
positions. See the description of write modes (Section 6.5.5.3 on page 290) for more 
information.