Справочник Пользователя для AMD LX 900@1.5W
412
AMD Geode™ LX Processors Data Book
Video Processor Register Descriptions
33234H
6.8
Video Processor Register Descriptions
This section provides information on the registers associ-
ated with the Video Processor: Standard GeodeLink
Device (GLD) and Video Processor Specific MSRs
(accessed via the RDMSR and WRMSR instructions), and
two blocks of functional memory mapped registers (Video
Processor and Flat Panel).
ated with the Video Processor: Standard GeodeLink
Device (GLD) and Video Processor Specific MSRs
(accessed via the RDMSR and WRMSR instructions), and
two blocks of functional memory mapped registers (Video
Processor and Flat Panel).
Table 6-75 through Table 6-78 are register summary tables
that include reset values and page references where the bit
descriptions are provided.
that include reset values and page references where the bit
descriptions are provided.
Note:
The MSR address is derived from the perspective
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
For memory offset mapping details, see Section
4.1.3 "Memory and I/O Mapping" on page 47.
4.1.3 "Memory and I/O Mapping" on page 47.
Table 6-69. Standard GeodeLink™ Device MSRs Summary
MSR
Address
Type
Register Name
Reset Value
Reference
R/W
Table 6-70. Video Processor Module Specific MSRs Summary
MSR
Address
Type
Register Name
Reset Value
Reference
Table 6-71. Video Processor Module Configuration Control Registers Summary
VP
Memory
Offset
Type
Register Name
Reset Value
Reference
Video Processor