Справочник Пользователя для AMD LX 900@1.5W
AMD Geode™ LX Processors Data Book
495
Video Input Port Register Descriptions
33234H
6.10.2.5 VIP Current/Target (VIP_CUR_TAR)
6.10.2.6 VIP Max Address (VIP_MAX_ADDR)
VIP Memory Offset 10h
Type
Type
R/W
Reset Value
00000000h
VIP_CUR_TAR Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LINE_TARGET
CURRENT_LINE
VIP_CUR_TAR Register Bit Descriptions
Bit
Name
Description
31:16
LINE_TARGET
Line Target. Indicates the video line to generate an interrupt on.
15:0
CURRENT_
LINE (RO)
LINE (RO)
Current Line (Read Only). Indicates the video line currently being captured. Line count-
ing begins on the first active line.
ing begins on the first active line.
The count indicated in this field is reset to 0 at the start of each field (interlaced) or frame
(non-interlated).
(non-interlated).
VIP Memory Offset 14h
Type
Type
R/W
Reset Value
FFFFFFFFh
VIP_MAX_ADDR Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
MAX_ADDR
RSVD
VIP_MAX_ADDR Bit Descriptions
Bit
Name
Description
31:3
MAX_ADDR
Max Address. This value is compared with the GLIU address. If the GLIU address is
equal or greater then this value, a VIP addressing error is detected. This resets the
RUN_MODE bits (VIP Memory Offset 00h[7:5]) to 000, stopping the VIP from capturing
data. A frame error INT is also generated. The A_ERR_EN bit (VIP Memory Offset
04h[30])must be set to enable this function. The VIP must be reset by writing a 1 to the
VRST bit (VIP Memory Offset 00h[0]) to clear the addressing error. Bits [2:0] of this regis-
ter are not used in the comparison. Note that the VIP will only stop capturing data on this
address, it will continue writing data from the FIFO into memory. Up to 192 QWORDs
(1536 bytes) can be written past this address (max # data in FIFO, although it is more
likely that ~10-20 QWORDs are written.
equal or greater then this value, a VIP addressing error is detected. This resets the
RUN_MODE bits (VIP Memory Offset 00h[7:5]) to 000, stopping the VIP from capturing
data. A frame error INT is also generated. The A_ERR_EN bit (VIP Memory Offset
04h[30])must be set to enable this function. The VIP must be reset by writing a 1 to the
VRST bit (VIP Memory Offset 00h[0]) to clear the addressing error. Bits [2:0] of this regis-
ter are not used in the comparison. Note that the VIP will only stop capturing data on this
address, it will continue writing data from the FIFO into memory. Up to 192 QWORDs
(1536 bytes) can be written past this address (max # data in FIFO, although it is more
likely that ~10-20 QWORDs are written.
2:0
RSVD
Reserved. Set to 0.