Справочник Пользователя для AMD LX 900@1.5W
522
AMD Geode™ LX Processors Data Book
Security Block Register Descriptions
33234H
6.12.3.3 SB AES Interrupt (SB_AES_INT)
6.12.3.4 SB Source A (SB_SOURCE_A)
SB Memory Offset 008h
Type
Type
R/W
Reset Value
00000007h
SB_AES_INT Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18
17
16
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RSVD
INT_STATUS
RSVD
INT_MASK
SB_AES_INT Register Bit Descriptions
Bit
Name
Description
31:19
RSVD
Reserved.
18:16
INT_STATUS
AES Interrupt Status.
0: INT not pending.
1: INT pending.
1: INT pending.
Writing a 1 to this bit clears the status.
18: EEPROM operation complete.
17: AES context B complete.
16: AES context A complete.
17: AES context B complete.
16: AES context A complete.
15:3
RSVD
Reserved.
2:0
INT_MASK
AES Interrupt Mask.
0: Enable, unmask the INT.
1: Disabled, mask the INT.
1: Disabled, mask the INT.
2: When enabled (0), allows EEPROM operation complete INT.
1: When enabled (0), allows AES context B complete INT.
0: When enabled (0), allows AES context A complete INT.
1: When enabled (0), allows AES context B complete INT.
0: When enabled (0), allows AES context A complete INT.
SB Memory Offset 010h
Type
Type
R/W
Reset Value
00000000h
SB_SOURCE_A Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
SOURCE_A
RSVD
SB_SOURCE_A Register Bit Descriptions
Bit
Name
Description
31:4
SOURCE_A
Source A. The Source field is a 32-bit pointer to system memory. It points to the start of
data to be encrypted or decrypted. The lower four bits must be written as zero and
always read zero. This forces the data fetching to begin on a 16-byte boundary. This
register should not be changed during an AES encryption or decryption operation using
the A pointer (i.e., while STA is asserted, SB Memory Offset 000h[0] = 1). This register
can be modified during an operation using the B pointer set (while STB is asserted, SB
Memory Offset 004h[0] = 1).
data to be encrypted or decrypted. The lower four bits must be written as zero and
always read zero. This forces the data fetching to begin on a 16-byte boundary. This
register should not be changed during an AES encryption or decryption operation using
the A pointer (i.e., while STA is asserted, SB Memory Offset 000h[0] = 1). This register
can be modified during an operation using the B pointer set (while STB is asserted, SB
Memory Offset 004h[0] = 1).
3:0
RSVD
Reserved. Set to 0.