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AMD Geode™ LX Processors Data Book
539
GeodeLink™ Control Processor Register Descriptions
33234H
6.14
GeodeLink™ Control Processor Register Descriptions
All GeodeLink Control Processor registers are Model Spe-
cific Registers (MSRs) and are accessed via the RDMSR
and WRMSR instructions.
cific Registers (MSRs) and are accessed via the RDMSR
and WRMSR instructions.
The registers associated with the GLCP are the Standard
GeodeLink™ Device (GLD) MSRs and GLCP Specific
MSRs. Table 6-85 and Table 6-86 are register summary
GeodeLink™ Device (GLD) MSRs and GLCP Specific
MSRs. Table 6-85 and Table 6-86 are register summary
tables that include reset values and page references where
the bit descriptions are provided.
the bit descriptions are provided.
Note:
The MSR address is derived from the perspective
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
of the CPU Core. See Section 4.1 "MSR Set" on
page 45 for more details on MSR addressing.
Table 6-85. Standard GeodeLink™ Device MSRs Summary
MSR
Address
Type
Register Name
Reset Value
Reference
Table 6-86. GLCP Specific MSRs Summary
MSR
Address
Type
Register Name
Reset Value
Reference
GLCP Control MSRs