Справочник Пользователя для AMD LX 900@1.5W
622
AMD Geode™ LX Processors Data Book
Instruction Set
33234H
8.1.2.4
eee Field (MOV-Instruction Register Selection)
The eee field (bits [5:3]) is used to select the control, debug, and test registers in the MOV instructions. The type of register
and base registers selected by the eee field are listed in Table 8-7. The values shown in Table 8-7 are the only valid encod-
ings for the eee bits.
and base registers selected by the eee field are listed in Table 8-7. The values shown in Table 8-7 are the only valid encod-
ings for the eee bits.
8.1.3
mod and r/m Byte (Memory Addressing)
The mod and r/m fields within the mod r/m byte select the type of memory addressing to be used. Some instructions use a
fixed addressing mode (e.g., PUSH or POP) and therefore, these fields are not present. Table 8-8 lists the addressing method
when 16-bit addressing is used and a mod r/m byte is present. Some mod r/m field encodings are dependent on the w field
and are shown in Table 8-9.
fixed addressing mode (e.g., PUSH or POP) and therefore, these fields are not present. Table 8-8 lists the addressing method
when 16-bit addressing is used and a mod r/m byte is present. Some mod r/m field encodings are dependent on the w field
and are shown in Table 8-9.
Table 8-7. eee Field Encoding
eee Field
Register Type
Base Register
000
Control Register
CR0
010
Control Register
CR2
011
Control Register
CR3
100
Control Register
CR4
000
Debug Register
DR0
001
Debug Register
DR1
010
Debug Register
DR2
011
Debug Register
DR3
110
Debug Register
DR6
111
Debug Register
DR7
000
Test Register
TR0
001
Test Register
TR1
010
Test Register
TR2
011
Test Register
TR3
100
Test Register
TR4
101
Test Register
TR5
110
Test Register
TR6
111
Test Register
TR7
Table 8-8. mod r/m Field Encoding
mod Field
r/m Field
16-Bit Address Mode with
mod r/m Byte (Note 1)
32-Bit Address Mode with mod r/m Byte and
No s-i-b Byte Present
00
000
DS:[BX+SI]
DS:[EAX]
00
001
DS:[BX+DI]
DS:[ECX]
00
010
SS:[BP+SI]
DS:[EDX]
00
011
SS:[BP+DI]
DS:[EBX]
00
100
DS:[SI]
s-i-b is present (See Table 8-15 on page 626)
00
101
DS:[DI]
DS:[d32]
00
110
DS:[d16]
DS:[ESI]
00
111
DS:[BX]
DS:[EDI]