Справочник Пользователя для AMD LX 900@1.5W

33234H

The RSM instruction restores the state of the processor from the System Management Mode (SMM) header, and then
jumps to the address indicated by the NEXT_IP field of the SMM header. Below is the format of the SMM header.

All bits of the EFlags register is restored from the SMM header.

#UD

If current privilege level is not 0, or the SMM_INST_EN = 0 and if the processor is not in SMM and if the processor

is not in DMM.

0F AA

RSM

36

Return from SMI

DR7

-4

EFlags

-8

CR0

-C

CURRENT_IP

-10

NEXT_IP

-14

CS_FLAGS

Code Segment Selector

-18

G

D

0

Av

0

1

DPL

1

1

Cf

R

A

INDEX

TI

RPL

CS_BASE

-1C

0

CS_LIMIT[19:0]

-20

SS_FLAGS

SMM Flags

-24

G

B

0

Av

0

1

DPL

1

0

E

W

A

c

r

N

V

X

M

H

S

P

I

c

w

0

I/O SIZE

I/O ADDRESS[15:0]

-28

I/O_DATA

-2C

SMM_CTL

-30

0

-34

IF (CPL<>0 OR (SMM_INST_EN=0 AND SMM=0 AND DMM=0))

#UD;

ELSE

SMM_CTL <= SMM_HEADER[SMM_CTL];
SS.FLAGS <= SMM_HEADER[SS.FLAGS];
CPL <= SMM_HEADER[SS.DPL];
CS.LIMIT <= SMM_HEADER[CS.LIMIT];
CS.BASE <= SMM_HEADER[CS.BASE]
CS.SELECTOR <= SMM_HEADER[CS.SELECTOR];
CS.FLAGS <= SMM_HEADER[CS.FLAGS];
CR0 <= SMM_HEADER[CR0];
EFLAGS <= SMM_HEADER[EFLAGS];
IF (!DMM_CTL.DBG_AS_DMI)

DR7 <= SMM_HEADER[DR7];

IF (SMM_HEADER[N])

SMM <= 1;

else

SMM <= 0;

IF (SMM_HEADER[H])

HALT PROCESSOR;

ELSE

JUMP to CS at OFFSET of SMM_HEADER[NEXT_IP];