Справочник Пользователя для AMD LX 800@0.9W
AMD Geode™ LX Processors Data Book
311
Display Controller Register Descriptions
33234H
6.6.2
Display Controller Specific MSRs
6.6.2.1
SPARE MSR
6.6.2.2
DC RAM Control MSR (DC_RAM_CTL_MSR)
MSR Address
80000011h
Type
R/W
Reset Value
00000000_00000000h
SPARE_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RSVD
DISABLE
_
V
F
IFO_WM
RSVD
SPARE_MSR Bit Descriptions
Bit
Name
Description
63:7
RSVD
Reserved.
6
DISABLE_
VFIFO_WM
VFIFO_WM
Disable Video FIFO Watermarks. When set, the video watermarks in
DC_ARB_CFG[19:12] have no effect.
DC_ARB_CFG[19:12] have no effect.
5:0
RSVD
Reserved.
MSR Address
80000012h
Type
R/W
Reset Value
00000000_02020202h
DC_RAM_CTL_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RSVD
CF
IF
O
_
CT
L
RSVD
D
V
_RAM_C
TL
DC_RAM_CTL_MSR Bit Descriptions
Bit
Name
Description
63:11
RSVD
Reserved.
10:8
CFIFO_CTL
CFIFO RAM Delay Control.
7:3
RSVD
Reserved.
2:0
DV_RAM_CTL
DV RAM Delay Control.