Справочник Пользователя для AMD LX 800@0.9W

33234H

DEST[31:0] <= reciprocal(SRC[31:0]);
DEST[63:32] <= RECIPROCAL(SRC[63:32]);

PFRCPV performs the same operation as the PFRCP instruction except that PFRCPV operates on both halves of its oper-
ands, while PFRCP operates on only bits [31:0] of its operand.

None.

#GP(0)

If a memory operand is illegal and not in SS.

#SS(0)

If memory operand is illegal and in SS.

#PF(code)

Page fault.

#AC

Unaligned access.

#UD

Illegal opcode.

This instruction is enabled by the INV_3DNOW_ENABLE bit (bit 1) of the ID_CONFIG MSR (MSR 00001250h).

PFRSQRTV performs the same operation as the PFRSQRT instruction except that PFRSQRTV operates on both halves of
its operands, while PFSQRT operates on only bits [31:0] of its operand.

None.

#GP(0)

If a memory operand is illegal and not in SS.

#SS(0)

If memory operand is illegal and in SS.

#PF(code)

Page fault.

#AC

Unaligned access.

#UD

Illegal opcode.

This instruction is enabled by the INV_3DNOW_ENABLE bit (bit 1) of the ID_CONFIG MSR (MSR 00001250h).

0F 0F / 86

PFRCPV xr,xr/m64

2

Approximate reciprocal

0F 0F / 87

PFRSQRTV xr,xr/m64

2

Approximate reciprocal square root

DEST[31:0] <= reciprocal_SQUARE_ROOT(SRC[31:0]);
DEST[63:32] <= RECIPROCAL_SQUARE_ROOT(SRC[63:32]);