Справочник Пользователя для Samsung S3C2440A

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LCD  CONTROLLER  
 
S3C2440A  RISC  MICROPROCESSOR                     
15-44 
 
Register Setting Guide (TFT LCD) 
The CLKVAL register value determines the frequency of VCLK and frame rate. 
Frame Rate = 1/ [ { (VSPW+1) + (VBPD+1) + (LIINEVAL + 1) + (VFPD+1) } x {(HSPW+1) + (HBPD +1) 
                   + (HFPD+1) + (HOZVAL + 1) } x { 2 x ( CLKVAL+1 ) / ( HCLK ) } ] 
For applications, the system timing must be considered to avoid under-run condition of the fifo of the lcd controller 
caused by memory bandwidth contention. 
 
Example 4: 
TFT Resolution: 240 x 240, 
VSPW =2, VBPD =14, LINEVAL = 239, VFPD =4 
HSPW =25, HBPD =15, HOZVAL = 239, HFPD =1 
CLKVAL = 5 
HCLK = 60 M (hz) 
The parameters below must be referenced by LCD size and driver specifications:  
VSPW, VBPD, LINEVAL, VFPD, HSPW, HBPD, HOZVAL, and HFPD  
If target frame rate is 60–70Hz, then CLKVAL should be 5. 
So, Frame Rate = 67Hz