Справочник Пользователя для Samsung S3C2440A
S3C2440A RISC MICROPROCESSOR
CAMERA INTERFACE
23-24
PREVIEW STATUS REGISTER
Register Address
R/W
Description
Reset
Value
CIPRSTATUS
0x4F000098
R
Preview path status
0
CIPRSTATUS Bit
Description
Initial
State
OvFiCb_Pr
[31]
Overflow state of preview source FIFO Cb
0
OvFiCr_Pr
[30]
Overflow state of preview source FIFO Cr
0
FrameCnt_Pr
[27:26] Frame count of preview DMA
0
FlipMd_Pr
[24:23] Flip mode of preview DMA
0
ImgCptEn_PrSC
[21]
Image capture enable of preview path
0
IMAGE CAPTURE ENABLE REGISTER
This register must be set at last.
Register Address
R/W
Description
Reset
Value
CIIMGCPT
0x4F0000A0
RW
Image capture enable command
0
CIGCTRL Bit
Description
Initial
State
ImgCptEn
[31]
Camera interface global capture enable
0
ImgCptEn_CoSc [30]
Capture enable for codec scaler.
This bit must be ‘0’ in scaler bypass mode.
This bit must be ‘0’ in scaler bypass mode.
0
ImgCptEn_PrSc [29]
Capture enable for preview scaler
This bit must be ‘0’ in scaler bypass mode.
This bit must be ‘0’ in scaler bypass mode.
0