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Figure 4-3.  68-Pin VHDCI Connector Pin Assignments

Table 4-1 describes the MDR-26 and 68-pin VHDCI signal connections.

Table 4-1.  I/O Connector Signals

TTL_TRIG

TTL external triggers/DIO lines (input/output)

DGND

A direct connection to digital GND on the 1428 device

CHASSIS_GND

A direct connection to the computer’s chassis, which is grounded through the 
power cord

X<3..0>±

LVDS Base configuration data and enable signals from the acquisition device 
to the camera

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

DGND
DGND

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

DGND
DGND

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

DGND
DGND
DGND
DGND

CHASSIS_GND

RESERVED

DGND

RESERVED

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
DGND
Y (0)–
Y (0)+
Y (1)–
Y (1)+
Y (2)–
Y (2)+
YCLK –
YCLK+
Y (3)– 
Y (3)+
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
TTL_TRIG(0)
TTL_TRIG(1)
TTL_TRIG(2)
TTL_TRIG(3)
CHASSIS_GND
RESERVED
DGND
RESERVED