Справочник Пользователя для National Instruments NI PCI-6111

The NI PCI-6110/6111UI normally generates UPDATE* unless you select 
some external source. The WFTRIG signal starts the UI, and the UI can be 
stopped by software or the internal Buffer Counter.

D/A conversions generated by either an internal or external UPDATE* 
signal do not occur when gated by the software command register gate.

Any PFI pin can externally input the UISOURCE signal, which is not 
available as an output on the I/O connector. The UI uses UISOURCE as a 
clock to time the generation of the UPDATE* signal. You must configure 
the PFI pin you select as the source for UISOURCE in the level-detection 
mode. You can configure the polarity selection for the PFI pin for either 
active high or active low. 

Figure 4-26 shows the timing requirements for the UISOURCE signal.

Figure 4-26.  UISOURCE Signal Timing

The maximum allowed frequency is 20 MHz, with a minimum pulse width 
of 10 ns high or low. There is no minimum frequency limitation.

Either the 20 MHz or 100 kHz internal timebase normally generates the 
UISOURCE signal unless you select some external source.

The general-purpose timing signals are GPCTR0_SOURCE, 
GPCTR0_GATE, GPCTR0_OUT, GPCTR0_UP_DOWN, 
GPCTR1_SOURCE, GPCTR1_GATE, GPCTR1_OUT, 
GPCTR1_UP_DOWN, and FREQ_OUT.

t

w 

= 10 ns minimum

t

p 

= 50 ns minimum

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p

t

w

t

w