Справочник Пользователя для IBM MiEM78P468L
EM78P468N/EM78P468L
8-Bit Microcontroller
18
•
Product Specification (V1.5) 02.15.2007
(This specification is subject to change without further notice)
6.2.11 IOCE0/LPWTPR (Low-Pulse Width Timer Preset Register)
(Address: 0Eh, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7 ~ Bit 0:
All are low-pulse width timer buffer that user can read and write.
Low-pulse width timer preset is an eight-bit down-counter with 8-bit prescaler that is
used as IOCE0 to preset the counter and read preset value. The prescaler is set by
IOCA1 register. After an interrupt, it will reload the preset value.
For PWM or IR application, this control register is set as low pulse width.
If the low-pulse width timer clock source is F
T
, then
Low pulse time =
T
F
)
1
+
value
_
preset
(
*
prescaler
6.2.12 IOCF0/IMR (Interrupt Mask Register)
(Address: 0Fh, Bit 0 of R5 = “0”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICIE LPWTE
HPWTE
CNT2E
CNT1E INT1E INT0E TCIE
Bit 7 ~ Bit 0:
interrupt enable bit. Enable the respective interrupt source.
0:
disable interrupt
1:
enable interrupt
IOCF0 register is readable and writable.
Registers of IOC Page 1 (IOC61 ~ IOCE1, Bit 0 of R5 = “1”)
6.2.13 IOC61/WUCR (Wake-up and Sink Current of P5.7/IROUT
Control Register)
(Address: 06h, Bit 0 of R5 = “1”)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IROCS
-- -- --
/WUE8H
/WUE8L
/WUE6H
/WUE6L
Bit 7:
IROCS: IROUT/Port 5.7 output sink current set
P5.7/IROUT Sink Current
IROCS
VDD=5V
VDD=3V
0
10 mA
6 mA
1
20 mA
12 mA
Bits 6, 5, 4:
Not used
Bit 3 (/WUE8H):
0/1
→ enable/disable P8.4~P8.7 pin change wake-up function