Справочник Пользователя для IBM uPD78P081(A2)
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CHAPTER 4 PORT FUNCTIONS
Figure 4-8. P71 and P72 Block Diagram
PUO : Pull-up resistor option register
PM
: Port mode register
RD
: Port 7 read signal
WR : Port 7 write signal
P-ch
WR
PM
WR
PORT
RD
WR
PUO
V
DD
Selector
PUO7
Output Latch
(P71 and P72)
(P71 and P72)
PM71, PM72
Internal bus
Alternate Function
P71/SO2/TxD,
P72/SCK2/ASCK
P72/SCK2/ASCK