Техническая Спецификация для Focus Enhancements FS456

FS453/4 AND FS455/6

DATA SHEET: HARDWARE REFERENCE

Table of Contents, Figures & Tables

Document Overview

Introduction 4

1.1

General Description ..............................4

1.2

How does it work?.................................4

1.2.1

SDTV Output ...............................4

1.2.2

HDTV Output...............................4

1.2.3

VGA (RGB) Output......................4

1.3

General Physical Requirements ...........4

Architectural Overview

2.1

Inputs ....................................................5

2.1.1

Input to Output Conversion Matrix6

2.2

Color Space Converter .........................6

2.3

Patented 2D Scaler ...............................6

2.4

Patented 2D Flicker Filter .....................7

2.5

FIFO 7

2.6

Post (Horizontal Up) Scaler ..................7

2.7

Encoder and Inverse Color Space ........7

2.8

Bi and Tri-Level Sync Insertion (HDTV) 7

2.9

Configurable 10 bit DACs .....................7

2.10

Clock Management ...............................7

2.11

Oscillators and PLL ...............................7

2.12

Serial Control Interface .........................8

2.13

Sync Timing Generator .........................8

2.14

Input Synchronization ...........................8

Technical Highlights

3.1

Scaling ..................................................9

3.1.1

Video Scaler Challenges.............9

3.1.2

FS453 Solution............................9

3.2

Flicker Reduction ................................10

3.2.1

Flicker Filter Challenges............10

3.2.2

FS453 Solution..........................10

3.3

Video Encoding ...................................11

3.3.1

Encoding Challenges ................11

3.3.2

FS453 Solution..........................11

Scaling and Positioning Notes

4.1

Vertical Scaling ...................................12

4.2

Horizontal Scaling ...............................13

4.3

Vertical and Horizontal Position ..........13

Pin Assignments

5.1

FS453

⇔ GCC Pin Mapping...............16

5.2

Pin Descriptions ..................................17

Control Register Function Map

6.1

Specifications 24

7.1

Absolute Maximum and Recommended
Ratings ................................................24

7.2

Electrical Characteristics.....................25

7.3

Switching Characteristics....................27

Mechanical Dimensions

8.1

80-Lead PQFP Package .....................28

8.2

88-Lead FBGA Package .....................29

Component Placement

9.1

Power/Ground .....................................30

9.1.1

Power ........................................ 30

9.1.2

Ground ...................................... 31

9.2

DIGITAL SIGNALS ............................. 31

9.2.1

Digital Signal Routing................ 31

9.2.2

Video Inputs .............................. 32

9.3

ANALOG SIGNALS ............................ 32

9.3.1

Video Output Filters .................. 32

9.4

CLOCK/OSCILLATOR........................ 34

9.4.1

Reference Crystal Oscillator ..... 34

9.4.2

FS453 Pixel Clock..................... 34

9.4.3

Pixel Clock Mode ...................... 35

9.5

EMI Case Study .................................. 37

9.6

Solder Re-flow Profiles ....................... 38

Figure 1: FS453 Functional Block Diagram..............5

Figure 2: FS453 Scaler Luma Frequency

Response .........................................................9

Figure 3: FS453 Flicker Filter Diagonal

Response .......................................................10

Figure 4: Equations for VTOTAL and VSC.............12

Figure 5: VTOTAL and VACTIVE ratios must

match..............................................................12

Figure 6: HSC Equations ........................................13

Figure 7: PQFP Pin Diagram ..................................14

Figure 8 FBGA Pin Diagram ...................................15

Figure 9: PQFP Package Outline & Dimensions ....28

Figure 10 FBGA Package Outline & Dimensions ...29

Figure 11: Recommended Power Filter

Networks ........................................................31

Figure 12: Recommended Output Filter .................33

Figure 13: Pixel Clock Pseudo-master Mode .........36

Figure 14: Pixel Clock Slave Mode.........................36

Figure 15 PQFP Package (Lead Solder)................38

Figure 16 FBGA Package (Lead Solder)................39

Figure 17 PQFP or FBGA Package (Lead-Free

Solder)............................................................39

Table 1: Input to Output Conversion Matrix..............6

Table 2: FS453 PQFP Pin Assignments ................14

Table 3: FS453 to GCC Pin Mapping .....................16

Table 4: FS453 Pin Descriptions ............................20

Table 5: Register Reference Table.........................23

Table 6: Absolute Maximum and Recommended

Ratings ...........................................................24

Table 7: Electrical Characteristics ..........................26

Table 8: Switching Characteristics .........................27

Table 9: Package Dimensions ................................28

Table 10: Output Filter Component Values ............34

JANUARY, 2005, VERSION 3.0

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FOCUS Enhancements Semiconductor