Справочник Пользователя для Intel 820E

Intel

Intel

®

820E Chipset

R

Design Guide

7

Decoupling Recommendation for CK133 and DRCG ................................................. 174

DRCG Frequency Selection and the DRCG+ ............................................................. 175

DRCG Frequency Selection Table and Jitter Specification....................... 175

DRCG+ Frequency Selection Schematic .................................................. 176

System Manufacturing ............................................................................................................. 177

Stack-Up Requirement ................................................................................................ 177

PCB Materials ........................................................................................... 177

Design Process ......................................................................................... 178

Test Coupon Design Guidelines................................................................ 178

Recommended Stack-Up.......................................................................... 179

Inner-Layer Routing................................................................................... 179

Impedance Calculation Tools.................................................................... 180

Testing Board Impedance ......................................................................... 181

Board Impedance/Stack-up Summary ...................................................... 181

System Design Considerations ................................................................................................ 183

Power Delivery............................................................................................................. 183

Terminology and Definitions...................................................................... 183

Power Delivery of Intel

820E Chipset Customer Reference Board ......... 184

ICH2 1.8 V / 3.3 V Power Sequencing ...................................................... 188

Excessive Power Consumption by 64/72-Mbit RDRAM............................ 190

Option 1: Reduce the Clock Frequency During Initialization ........ 190

6.1.5.2.

Option 2: Increase the Current Capability of the 2.5 V Voltage
Regulator ...................................................................................... 191

ICH2 Power Plane Split ............................................................................................... 192

Thermal Design Power................................................................................................ 193

Glue Chip 3 (Intel

820E Chipset Glue Chip) .............................................................. 193

Appendix A: Reference Design Schematics (Uniprocessor) ........................................................................... 195