Справочник Пользователя для AMD 4.4.5
AMD Confidential
User Manual
November 21
st
, 2008
132
Chapter 7: Device Configuration
7.26 ATI SB400/SB600/SB700 Southbridge Devices
The ATI Southbridge devices provide the basic I/O Southbridge functionality of the
system. Features include 4 or 6 SATA ports, a PIO-mode IDE controller supporting 1 or
2 channels, fully functinoal USB 1.1 Controller supporting legacy emulation, an
LPC/ISA bridge, an SMB 2.0 compliant controller, an IOAPIC controller, HPET timer,
and legacy AT devices (8259 PIC, 8254 PIT, CMOS, and DMA controller). The legacy
AT devices have the standard behavior and IO addresses unless otherwise noted.
Interface
The Southbridge devices have several connection points. Possible connection points
include a PCI bus, an SMB bus, an LPC bus, and an upstream PCI-E link. The PCI bus
acts as a host bus, and should connect to a "PCI Bus Device". The SMB connects to
devices such as the DIMM, an SMB hub device, or another SMB compatible endpoint.
The LPC bus provides connectivity to devices such as Super IO chips and BIOS ROMs.
The PCI-E port is used for connectivity upstream to a compatible Northbridge Device.
See Section 7.27, "ATI RS480/RS780/RD790/RD890 Northbridge Devices", on page 134
for more information.
Initialization and Reset State
When first initialized, the Southbridge devices are in the default state. This is described in
detail in the respective datasheets. The legacy CMOS sub device initializes to all zeroes.
When reset, a Southbridge device takes on all default register values as above. The
exception to this is that the CMOS contents remain the same.
Contents of a BSD
The BSD file contains the contents of all registers. It also saves the contents of any
buffers, and states of all internal devices (HDD controllers, PIT, PIC, etc.). When the
BSD file is read in, all buffers are filled with past data, and all states are restored to their
saved states.
Configuration Options
These Southbridge devices share many configuration properties with the AMD-8111
Southbridge. For more information please refer to Section 7.11, “AMD-8111™
Southbridge Devices – IO Hubs”, on page 90.
Addittionaly these SouthBridge devices contain a SATA configuration page to attatch
images to the individual SATA ports.
system. Features include 4 or 6 SATA ports, a PIO-mode IDE controller supporting 1 or
2 channels, fully functinoal USB 1.1 Controller supporting legacy emulation, an
LPC/ISA bridge, an SMB 2.0 compliant controller, an IOAPIC controller, HPET timer,
and legacy AT devices (8259 PIC, 8254 PIT, CMOS, and DMA controller). The legacy
AT devices have the standard behavior and IO addresses unless otherwise noted.
Interface
The Southbridge devices have several connection points. Possible connection points
include a PCI bus, an SMB bus, an LPC bus, and an upstream PCI-E link. The PCI bus
acts as a host bus, and should connect to a "PCI Bus Device". The SMB connects to
devices such as the DIMM, an SMB hub device, or another SMB compatible endpoint.
The LPC bus provides connectivity to devices such as Super IO chips and BIOS ROMs.
The PCI-E port is used for connectivity upstream to a compatible Northbridge Device.
See Section 7.27, "ATI RS480/RS780/RD790/RD890 Northbridge Devices", on page 134
for more information.
Initialization and Reset State
When first initialized, the Southbridge devices are in the default state. This is described in
detail in the respective datasheets. The legacy CMOS sub device initializes to all zeroes.
When reset, a Southbridge device takes on all default register values as above. The
exception to this is that the CMOS contents remain the same.
Contents of a BSD
The BSD file contains the contents of all registers. It also saves the contents of any
buffers, and states of all internal devices (HDD controllers, PIT, PIC, etc.). When the
BSD file is read in, all buffers are filled with past data, and all states are restored to their
saved states.
Configuration Options
These Southbridge devices share many configuration properties with the AMD-8111
Southbridge. For more information please refer to Section 7.11, “AMD-8111™
Southbridge Devices – IO Hubs”, on page 90.
Addittionaly these SouthBridge devices contain a SATA configuration page to attatch
images to the individual SATA ports.